MC908JL3EMPE Freescale Semiconductor, MC908JL3EMPE Datasheet - Page 131

• Manufacturer Part Number: MC908JL3EMPE
• Description: IC MCU 4K FLASH W/OSC 28-PDIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908JL3EMPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 23
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-DIP (0.600", 15.24mm)
• Processor Series: HC08JL
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 2
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

15.4 Break Module Registers
These registers control and monitor operation of the break module:
15.4.1 Break Status and Control Register (BRKSCR)
The break status and control register contains break module enable and status bits.
BRKE — Break Enable Bit
BRKA — Break Active Bit
Freescale Semiconductor
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This read/write bit enables breaks on break address register matches. Clear BRKE by writing a zero
to bit 7. Reset clears the BRKE bit.
This read/write status and control bit is set when a break address match occurs. Writing a one to BRKA
generates a break interrupt. Clear BRKA by writing a zero to it before exiting the break routine. Reset
clears the BRKA bit.
1 = Breaks enabled on 16-bit address match
0 = Breaks disabled
1 = Break address match
0 = No break address match
Break status and control register (BRKSCR)
Break address register high (BRKH)
Break address register low (BRKL)
Break status register (BSR)
Break flag control register (BFCR)
Address:
Reset:
Read:
Write:
Figure 15-3. Break Status and Control Register (BRKSCR)
$FE0E
BRKE
Bit 7
0
= Unimplemented
BRKA
MC68HC908JL3E Family Data Sheet, Rev. 4
6
0
5
0
0
4
0
0
3
0
0
2
0
0
1
0
0
Break Module Registers
Bit 0
0
0
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