MC908JL3EMPE Freescale Semiconductor, MC908JL3EMPE Datasheet - Page 74

• Manufacturer Part Number: MC908JL3EMPE
• Description: IC MCU 4K FLASH W/OSC 28-PDIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908JL3EMPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 23
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-DIP (0.600", 15.24mm)
• Processor Series: HC08JL
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 2
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 12 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -
• Lead Free Status / Rohs Status: Details

Monitor ROM (MON)
Entering monitor mode with V
or the RST. (See
operation.)
If entering monitor mode without high voltage on IRQ and reset vector being blank ($FFFE and $FFFF)
(Table 7-1
including the PTB3 frequency divisor selection, are not in effect. This is to reduce circuit requirements
when performing in-circuit programming.
Entering monitor mode with the reset vector being blank, the COP is always disabled regardless of the
state of IRQ or the RST.
Figure
IRQ = V
Enter monitor mode with the pin configuration shown above by pulling RST low and then high. The rising
edge of RST latches monitor mode. Once monitor mode is latched, the values on the specified pins can
change.
Once out of reset, the MCU waits for the host to send eight security bytes. (See
security bytes, the MCU sends a break signal (10 consecutive logic zeros) to the host, indicating that it is
ready to receive a command. The break signal also provides a timing reference to allow the host to
determine the necessary baud rate.
In monitor mode, the MCU uses different vectors for reset, SWI, and break interrupt. The alternate vectors
are in the $FE page instead of the $FF page and allow code execution from the internal monitor firmware
instead of user code.
74
7-2. shows a simplified diagram of the monitor mode entry when the reset vector is blank and
DD
. An OSC1 frequency of 9.8304MHz is required for a baud rate of 9600.
condition set 3, where applied voltage is V
Chapter 5 System Integration Module (SIM)
Figure 7-2. Low-Voltage Monitor Mode Entry Flowchart
TST
on IRQ, the COP is disabled as long as V
MC68HC908JL3E Family Data Sheet, Rev. 4
MONITOR MODE
TRIGGERED?
POR RESET
IS VECTOR
EXECUTE
MONITOR
BLANK?
CODE
POR
YES
YES
NO
NO
DD
), then all port B pin requirements and conditions,
NORMAL USER
for more information on modes of
MODE
TST
is applied to either the IRQ
7.4
Freescale Semiconductor
Security.) After the