MC9S08RD32DWER Freescale Semiconductor, MC9S08RD32DWER Datasheet - Page 125

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MC9S08RD32DWER

Manufacturer Part Number
MC9S08RD32DWER
Description
IC MCU 8BIT 32K FLASH 28-SOIC
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08RD32DWER

Core Processor
HCS08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-SOIC (0.300", 7.50mm Width)
Processor Series
S08RD
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SCI1, SPI1
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
39
Number Of Timers
2
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08RG60E
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details
9.2
Figure 9-2
The KBI module allows up to eight pins to act as additional interrupt sources. Four of these pins allow
falling-edge sensing while the other four can be configured for either rising-edge sensing or falling-edge
sensing. The sensing mode for all eight pins can also be modified to detect edges and levels instead of only
edges.
9.3
This on-chip peripheral module is called a keyboard interrupt (KBI) module because originally it was
designed to simplify the connection and use of row-column matrices of keyboard switches. However, these
inputs are also useful as extra external interrupt inputs and as an external means of waking up the MCU
from stop or wait low-power modes.
9.3.1
The KBIPEn control bits in the KBIxPE register allow a user to enable (KBIPEn = 1) any combination of
KBI-related port pins to be connected to the KBI module. Pins corresponding to 0s in KBIxPE are
general-purpose I/O pins that are not associated with the KBI module.
9.3.2
Synchronous logic is used to detect edges. Prior to detecting an edge, enabled keyboard inputs in a KBI
module must be at the deasserted logic level.
A falling edge is detected when an enabled keyboard input signal is seen as a logic 1 (the deasserted level)
during one bus cycle and then a logic 0 (the asserted level) during the next cycle.
Freescale Semiconductor
KBIxP0
KBIxP3
KBIxP4
KBIxPn
KBEDG4
KBEDGn
KBI Block Diagram
Keyboard Interrupt (KBI) Module
0
1
0
1
shows the block diagram for a KBI module.
S
S
Pin Enables
Edge and Level Sensitivity
KBIPE0
KBIPE3
KBIPEn
KBIPE4
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
Figure 9-2. KBI Block Diagram
KBIMOD
V
DD
D
CK
CLR
Q
INTERRUPT FF
KEYBOARD
KBACK
RESET
Keyboard Interrupt (KBI) Block Description
STOP
SYNCHRONIZER
BUSCLK
STOP BYPASS
KBIE
KBF
KEYBOARD
INTERRUPT
REQUEST
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