MC9S08RD32DWER Freescale Semiconductor, MC9S08RD32DWER Datasheet - Page 52

• Manufacturer Part Number: MC9S08RD32DWER
• Description: IC MCU 8BIT 32K FLASH 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08RD32DWER

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Processor Series: S08RD
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI1, SPI1
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08RG60E
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Memory
4.6.4
During reset, the contents of the nonvolatile location NVPROT is copied from FLASH into FPROT. Bits 0,
1, and 2 are not used and each always reads as 0. This register may be read at any time, but user program
writes have no meaning or effect. Background debug commands can write to FPROT at $1824.
1. Background commands can be used to change the contents of these bits in FPROT.
52
FPOPEN
KEYACC
FPS[2:0]
FPDIS
Field
Field
5:3
5
7
6
Reset
Reset
W
W
R
R
FLASH Protection Register (FPROT and NVPROT)
Enable Writing of Access Key — This bit enables writing of the backdoor comparison key. For more detailed
information about the backdoor key mechanism, refer to
0 Writes to $FFB0–$FFB7 are interpreted as the start of a FLASH programming or erase command.
1 Writes to NVBACKKEY ($FFB0–$FFB7) are interpreted as comparison key writes.
Open Unprotected FLASH for Program/Erase
0 Entire FLASH memory is block protected (no program or erase allowed).
1 Any FLASH location, not otherwise block protected or secured, may be erased or programmed.
FLASH Protection Disable
0 FLASH block specified by FPS2:FPS0 is block protected (program and erase not allowed).
1 No FLASH block is protected.
FLASH Protect Size Selects — When FPDIS = 0, this 3-bit field determines the size of a protected block of
FLASH locations at the high address end of the FLASH (see
locations cannot be erased or programmed.
FPOPEN
Reads of the FLASH return invalid data.
(1)
0
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
FPDIS
Figure 4-7. FLASH Configuration Register (FCNFG)
(1)
6
0
6
This register is loaded from nonvolatile location NVPROT during reset.
Figure 4-8. FLASH Protection Register (FPROT)
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
Table 4-8. FCNFG Field Descriptions
Table 4-9. FPROT Field Descriptions
KEYACC
FPS2
(1)
0
5
5
FPS1
(1)
4
0
4
Description
Description
Section 4.5,
FPS0
Table 4-10
(1)
0
3
3
“Security."
and
2
0
2
0
Table
4-11). Protected FLASH
Freescale Semiconductor
0
0
1
1
0
0
0
0