DSP56F807VF80 Freescale Semiconductor, DSP56F807VF80 Datasheet - Page 24

• Manufacturer Part Number: DSP56F807VF80
• Description: IC DSP 80MHZ 60K FLASH 160-BGA
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxr

Specifications of DSP56F807VF80

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 136KB (68K x 16)
• Program Memory Type: FLASH
• Ram Size: 6K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-MAPBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

24
Output Low Voltage (at IOL)
Output source current
Output source current
PWM pin output source current
PWM pin output sink current
Input capacitance
Output capacitance
V
Low Voltage Interrupt, external power supply
Low Voltage Interrupt, internal power supply
Power on Reset
1. Schmitt Trigger inputs are: EXTBOOT, IRQA, IRQB, RESET, TCS, ISA0-2, FAULTA0-3, ISB0-2, FAULTB0-3, TCK, TRST, TMS,
TDI, and MSCAN_RX
2. Analog inputs are: ANA[0:7], XTAL and EXTAL. Specification assumes ADC is not sampling.
3. PWM pin output source current measured with 50% duty cycle.
4. PWM pin output sink current measured with 50% duty cycle.
5. I
6. Run (operating) I
measured with all modules enabled.
7. Wait I
than 50pF on all outputs. C
with PLL enabled.
8. This low voltage interrupt monitors the V
separate traces. If V
tions when V
9. This low voltage interrupt monitors the internally regulated core power supply. If the output from the internal voltage is regulator
drops below V
the external power supply drops below the minimum specified value (3.0V).
10. Power
this signal remains active as long as the internal 2.5V is below 1.5V typical, no matter how long the ramp-up rate is. The internally
regulated voltage is typically 100mV less than V
DD
supply current
Operating Conditions:
DDT
Wait
Stop
Run
= I
DD
–
7
DD
6
on reset occurs whenever the internally regulated 2.5V digital supply drops below 1.5V typical. While power is ramping up,
DDA
measured using external square wave clock source (f
EIC
+ I
10
>V
, an interrupt is generated. Since the core logic supply is internally regulated, this interrupt will not be generated unless
DDA
EIO
DDA
DD
(Total supply current for V
(between the minimum specified V
measured using 8MHz clock source. All inputs 0.2V from rail; outputs unloaded. All ports configured as inputs;
drops below V
Table 3-4 DC Electrical Characteristics (Continued)
L
Characteristic
= 20pF on EXTAL; all ports configured as inputs; EXTAL capacitance linearly affects wait I
4
3
V
SS
EIO
56F807 Technical Data Technical Data, Rev. 16
= V
, an interrupt is generated. Functionality of the device is guaranteed under transient condi-
SSA
DDA
DD
DD
= 0 V, V
9
external power supply. V
8
+ V
during ramp-up until 2.5V is reached, at which time it self-regulates.
DDA
DD
DD
)
= V
and the point when the V
DDA
osc
= 3.0–3.6 V, T
= 8MHz) into XTAL; all inputs 0.2V from rail; no DC loads; less
DDA
is generally connected to the same potential as V
Symbol
C
I
V
I
V
V
I
V
DDT
A
I
OHP
C
I
OLP
POR
OH
OUT
OL
EIO
EIC
OL
EIO
IN
= –40° to +85°C, C
5
interrupt is generated).
Min
2.4
2.0
10
16
—
—
—
—
—
—
—
4
4
L
≤
Freescale Semiconductor
50pF, f
Typ
195
170
115
2.7
2.2
1.7
12
—
—
—
—
—
8
op
DD
= 80MHz
Max
220
200
145
; measured
0.4
3.0
2.4
2.0
—
—
—
—
—
—
DD
via
Unit
mA
mA
mA
mA
mA
mA
mA
pF
pF
V
V
V
V