DSP56F807VF80 Freescale Semiconductor, DSP56F807VF80 Datasheet - Page 3

• Manufacturer Part Number: DSP56F807VF80
• Description: IC DSP 80MHZ 60K FLASH 160-BGA
• Manufacturer: Freescale Semiconductor
• Series: 56F8xxr

Specifications of DSP56F807VF80

• Core Processor: 56800
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 136KB (68K x 16)
• Program Memory Type: FLASH
• Ram Size: 6K x 16
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 160-MAPBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Freescale Semiconductor
56F807 General Description
•
•
•
•
•
•
•
•
•
•
*
includes TCS pin which is reserved for factory use and is tied to VSS
3
4
3
4
4
4
4
4
4
2
4
2
2
2
4
14
4
Up to 40 MIPS at 80MHz core frequency
DSP and MCU functionality in a unified,
C-efficient architecture
Hardware DO and REP loops
MCU-friendly instruction set supports both DSP
and controller functions: MAC, bit manipulation
unit, 14 addressing modes
60K × 16-bit words (120KB) Program Flash
2K × 16-bit words (4KB) Program RAM
8K × 16-bit words (16KB) Data Flash
4K × 16-bit words (8KB) Data RAM
2K × 16-bit words (4KB) Boot Flash
Up to 64K × 16- bit words (128KB) each of external
Program and Data memory
6
6
Current Sense Inputs
Fault Inputs
Current Sense Inputs
Fault Inputs
A/D1
A/D2
A/D1
A/D2
Quad Timer C
PWM Outputs
PWM Outputs
/Quad Timer B
Quad Timer D
/Quad Timer
CAN 2.0A/B
Quadrature
Quadrature
Decoder 0
Dedicated
Decoder 1
/ Alt Func
GPIO
GPIO
GPIO
GPIO
SCI0
SCI1
SPI
or
or
or
VREF
VREF2
ADCA
ADCB
tion-Specific
Peripherals
Program Memory
61440 x 16 Flash
2048 x 16 SRAM
4096 x 16 SRAM
Memory &
2048 x 16 Flash
8192 x 16 Flash
Applica-
Data Memory
Boot Flash
Watchdog
Controller
PWMA
PWMB
Interrupt
COP/
56F807 Technical Data Technical Data, Rev. 16
RSTO
RESET
Hardware Looping Unit
•
MODULE CONTROLS
ADDRESS BUS [8:0]
Program Controller
DATA BUS [15:0]
56F807 Block Diagram
•
COP RESET
IRQA
•
and
IRQB
EXTBOOT
CGDB
XAB1
XAB2
XDB2
PDB
PAB
INTERRUPT
CONTROLS
6
JTAG/
OnCE
Port
Generation
•
Address
Unit
•
IPBus Bridge
16
VPP
•
•
•
•
•
•
•
•
•
•
•
(IPBB)
•
CONTROLS
VCAPC V
2
IPBB
Two 6 channel PWM Modules
Four 4 channel, 12-bit ADCs
Two Quadrature Decoders
CAN 2.0 B Module
Two Serial Communication Interfaces (SCIs)
Serial Peripheral Interface (SPI)
Up to four General Purpose Quad Timers
JTAG/OnCE
14 Dedicated and 18 Shared GPIO lines
160-pin LQFP or 160 MAPBGA Packages
Three 16-bit Input Registers
16 x 16 + 36 → 36-Bit MAC
Two 36-bit Accumulators
8
16
Digital Reg
•
DD
Data ALU
10*
16-Bit
56800
V
Low Voltage
Core
Supervisor
SS
Interface
TM
External
Bus
Unit
port for debugging
3
V
DDA
Analog Reg
Manipulation
Address Bus
3
Clock Gen
V
Data Bus
External
External
Control
SSA
Switch
Switch
PLL
Bus
Unit
Bit
6
16
10
A[00:05]
A[06:15] or
GPIO-E2:E3 &
GPIO-A0:A7
D[00:15]
PS Select
DS Select
WR Enable
RD Enable
EXTAL
CLKO
XTAL
3