ST16C654CQ100-F Exar Corporation, ST16C654CQ100-F Datasheet - Page 18

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ST16C654CQ100-F

Manufacturer Part Number
ST16C654CQ100-F
Description
IC UART FIFO 64B QUAD 100QFP
Manufacturer
Exar Corporation
Type
IrDAr
Datasheet

Specifications of ST16C654CQ100-F

Number Of Channels
4, QUART
Package / Case
100-LQFP
Features
*
Fifo's
64 Byte
Protocol
RS232
Voltage - Supply
2.97 V ~ 5.5 V
With Auto Flow Control
Yes
With Irda Encoder/decoder
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Data Rate
1.5 Mbps
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.97 V
Supply Current
6 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V or 5 V
No. Of Channels
4
Uart Features
Infrared (IrDA) Encoder/Decoder
Supply Voltage Range
2.97V To 5.5V
Operating Temperature Range
0°C To +70°C
Digital Ic Case Style
QFP
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
1016-1270

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST16C654CQ100-F
Manufacturer:
Exar Corporation
Quantity:
10 000
Company:
Part Number:
ST16C654CQ100-F
Quantity:
528
Company:
Part Number:
ST16C654CQ100-F
Quantity:
528
Company:
Part Number:
ST16C654CQ100-F
Quantity:
528
ST16C654/654D
2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO
When software flow control is enabled
characters with the programmed Xon or Xoff-1,2 character value(s). If receive character(s) (RX) match the
programmed values, the 654 will halt transmission (TX) as soon as the current character has completed
transmission. When a match occurs, the Xoff (if enabled via IER bit-5) flag will be set and the interrupt output
pin will be activated. Following a suspension due to a match of the Xoff character, the 654 will monitor the
receive data stream for a match to the Xon-1,2 character. If a match is found, the 654 will resume operation
and clear the flags (ISR bit-4).
Reset initially sets the contents of the Xon/Xoff 8-bit flow control registers to a logic 0. Following reset the user
can write any Xon/Xoff value desired for software flow control. Different conditions can be set to detect Xon/
Xoff characters
selected, the 654 compares two consecutive receive characters with two software flow control 8-bit values
(Xon1, Xon2, Xoff1, Xoff2) and controls TX transmissions accordingly. Under the above described flow control
mechanisms, flow control characters are not placed (stacked) in the user accessible RX data buffer or FIFO.
In the event that the receive buffer is overfilling and flow control needs to be executed, the 654 automatically
sends an Xoff message (when enabled) via the serial TX output to the remote modem. The 654 sends the Xoff-
1,2 characters two-character-times (= time taken to send two characters at the programmed baud rate) after
the receive FIFO crosses the programmed trigger level. To clear this condition, the 654 will transmit the
programmed Xon-1,2 characters as soon as receive FIFO is less than one trigger level below the programmed
trigger level.
* After the trigger level is reached, an xoff character is sent after a short span of time (= time required to send 2
A special character detect feature is provided to detect an 8-bit character when bit-5 is set in the Enhanced
Feature Register (EFR). When this character (Xoff2) is detected, it will be placed in the FIFO along with normal
incoming RX data.
The 654 compares each incoming receive character with Xoff-2 data. If a match exists, the received data will
be transferred to the RX FIFO and ISR bit-4 will be set to indicate detection of special character. Although the
Internal Register Table shows Xon, Xoff Registers with eight bits of character information, the actual number of
bits is dependent on the programmed word length. Line Control Register (LCR) bits 0-1 defines the number of
character bits, i.e., either 5 bits, 6 bits, 7 bits, or 8 bits. The word length selected by LCR bits 0-1 also
determines the number of bits that will be used for the special character comparison. Bit-0 in the Xon, Xoff
Registers corresponds with the LSB bit for the receive character.
characters); for example, after 2.083ms has elapsed for 9600 baud and 10-bit word length setting.
2.13
2.14
RX T
Auto Xon/Xoff (Software) Flow Control
RIGGER
Special Character Detect
16
56
60
8
Table 8
L
(See Table
EVEL
below explains this.
INT P
15) and suspend/resume transmissions. When double 8-bit Xon/Xoff characters are
T
IN
ABLE
A
16
56
60
8
CTIVATION
8: A
UTO
(See Table
X
ON
X
/X
(
OFF
CHARACTERS IN RX FIFO
OFF
15), the 654 compares one or two sequential receive data
C
18
(S
HARACTER
OFTWARE
16*
56*
60*
8*
(
S
) S
) F
ENT
LOW
)
C
ONTROL
X
(
CHARACTERS IN RX FIFO
ON
C
HARACTER
16
56
0
8
xr
(
S
) S
ENT
REV. 5.0.2
)

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