AD6636BC/PCB Analog Devices Inc, AD6636BC/PCB Datasheet - Page 37
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AD6636BC/PCB
Manufacturer Part Number
AD6636BC/PCB
Description
BOARD EVAL FOR AD6636
Manufacturer
Analog Devices Inc
Datasheet
1.AD6636BCPCB.pdf
(80 pages)
Specifications of AD6636BC/PCB
Rohs Status
RoHS non-compliant
Module/board Type
Evaluation Board
For Use With/related Products
AD6636
Lead Free Status / Rohs Status
Not Compliant
Maximum Number of Taps Calculated
The output rate of the CRCF filter is given by
where:
f
filter.
M
The CRCF filter consists of two multipliers (one each for the I
and Q paths). Each multiplier, working at the high speed clock
rate (PLL clock), can multiply (or tap once). Therefore, the
maximum number of filter taps that can be calculated
(symmetrical or asymmetrical filter) is given by
where:
f
the PLL clock multiplier.
f
Programming CRCF Registers for an Asymmetrical Filter
To program the CRCF registers for an asymmetrical filter:
1.
2.
3.
4.
5.
6.
DRCF
PLLCLK
CRCF
CRCF
is the output rate of the CRCF filter as calculated previously.
is the data rate out of the DRCF filter and into the CRCF
Write NTAPS – 1 in the CRCF taps register, where NTAPS
is the number of filter taps. The absolute maximum value
for NTAPS is 64 in asymmetrical filter mode.
Write 0 in the CRCF coefficient offset register.
Write 0 in the symmetrical filter bit in the CRCF control
register.
In the CRCF start address register, write the start address
for the coefficient RAM, typically equal to the coefficient
offset register.
In the CRCF stop address register, write the stop address
for the coefficient RAM, typically equal to
Write all coefficients in reverse order (start with last
coefficient) to the CRCF coefficient memory register. In
8-bit microport mode or serial port mode, write the lower
byte of the memory register first and then the higher byte.
In 16-bit microport mode, write the lower 16-bits of the
CRCF memory register first and then the high four bits.
After each write access to the CRCF coefficient memory
register, the internal RAM address is incremented starting
with the start address and ending with the stop address.
Maximum
f
is the decimation rate in the CRCF filter.
is the high speed internal processing clock generated by
CRCF
Coefficient Offset + NTAPS – 1
=
M
f
DRCF
CRCF
Number
of
Taps
=
ceil
⎛
⎜
⎜
⎝
f
PLLCLK
f
CRCF
⎞
⎟
⎟
⎠
−
1
Rev. A | Page 37 of 80
Note that each write or read access increments the internal
RAM address. Therefore, all coefficients should be read first
before reading them back. Also, for debugging purposes, each
RAM address can be written individually by making the start
and stop addresses the same. Therefore, to program one RAM
location, the user writes the address of the RAM location to
both the start and stop address registers, and then writes the
coefficient memory register.
Programming CRCF Registers for a Symmetrical Filter
To program the CRCF registers for a symmetrical filter:
1.
2.
3.
4.
5.
6.
Note that each write or read access increments the internal
RAM address. Therefore, all coefficients should be written first
before reading them back. Also, for debugging purposes, each
RAM address can be written individually by making the start
and stop addresses the same. Therefore, to program one RAM
location, the user writes the address of the RAM location to
both the start and stop address registers, and then writes the
coefficient memory register.
Write NTAPS – 1 in the CRCF taps register, where NTAPS
is the number of filter taps. The absolute maximum value
for NTAPS is 128 in symmetrical filter mode.
Write ceil(64 – NTAPS/2) to the CRCF coefficient offset
register, where the ceil function takes the closest integer
greater than or equal to the argument.
Write 1 to the symmetrical filter bit in the CRCF control
register.
In the CRCF start address register, write the start address
for the coefficient RAM, typically equal to the coefficient
offset register.
In the CRCF stop address register, write the stop
address for the coefficient RAM, typically equal to
Write all coefficients to the CRCF coefficient memory
register, starting with middle of the filter and working
towards the end of the filter. When coefficients are
numbered 0 to NTAPS – 1, the middle coefficient is given
by the coefficient number ceil(NTAPS/2). In 8-bit
microport mode or serial port mode, write the lower byte
of the memory register first and then the higher byte. In
16-bit microport mode, write the lower 16-bits of the
CRCF memory register first and then the high four bits.
After each write access to the CRCF coefficient memory
register, the internal RAM address is incremented starting
with the start address and ending with the stop address.
ceil(NTAPS/2) – 1
AD6636