AD9861BCPZ-50 Analog Devices Inc, AD9861BCPZ-50 Datasheet - Page 29

• Manufacturer Part Number: AD9861BCPZ-50
• Description: IC FRONT-END MIXED SGNL 64-LFCSP
• Manufacturer: Analog Devices Inc

Specifications of AD9861BCPZ-50

• Rf Type: WLL, WLAN
• Features: 10-bit ADC(s), 10-bit DAC(s)
• Package / Case: 64-LFCSP
• Supply Voltage Range: 2.7V To 3.6V
• Logic Case Style: LFCSP
• No. Of Pins: 64
• Operating Temperature Range: -40°C To +85°C
• Msl: MSL 3 - 168 Hours
• Termination Type: SMD
• Interface: SPI
• No. Of Channels: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Frequency: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Figure 76 shows a timing diagram of the AuxSPI when it is used to control and access an AuxADC.
Figure 77 shows the timing for each of the three AuxADC modes of operation.
EXTERNAL START COVERT BIT AND
SPI READOUT MODE
READOUT MODE WITH AUXILIARY SPI
NORMAL SPI READOUT
Figure 77. AuxADC Data Cycle Times for Various Readout Methods
AUXSPI_SDO
AUXSPI_CLK
AUXSPI_CS
16 SPI CLKs USED TO CONFIGURE AND
INITIATE A START CONVERSION
EXTERNAL PIN USED TO INITIATE A
START CONVERSION
EXTERNAL PIN USED TO INITIATE A
START CONVERSION
Figure 76. Timing Diagram of AuxSPI
1. AUXADC CONVERSION START SIGNAL
2. AUXADC CONVERSION DONE
3. AUXADC OUTPUT UDATE (MSB)
1 2 3
16 SPI CLK
Rev. 0 | Page 29 of 52
NORMAL SPI READOUT
CYCLE TIME = 16 SPI CLK +
D
9
D
8
t
CONVERSION
READOUT MODE WITH
AUXILIARY SPI
CYCLE TIME =
EXTERNAL START COVERT BIT AND
SPI READOUT MODE
CYCLE TIME =
=
t
t
C
C
+ 16 SPI CLK
16 SPI CLKs USED TO READ BACK
8 REGISTER BITS
16 SPI CLKs USED TO READ BACK
8 REGISTER BITS
8-BIT SERIAL
OUTPUT
t
t
C
C
+ 8 SPI CLK
+ 16 SPI CLK
D
0
03606-0-021
16 SPI CLK
03606-0-007
AD9861