TEF6730HW/V1,557 NXP Semiconductors, TEF6730HW/V1,557 Datasheet - Page 12

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TEF6730HW/V1,557

Manufacturer Part Number
TEF6730HW/V1,557
Description
IC DIGITAL IF FRONT END 64HTQFP
Manufacturer
NXP Semiconductors
Datasheets

Specifications of TEF6730HW/V1,557

Package / Case
64-TQFP Exposed Pad, 64-eTQFP, 64-HTQFP, 64-VQFP
Modulation Or Protocol
AM, FM, WB
Applications
AM/FM Radio Receiver
Current - Receiving
85.3mA, 114.7mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Voltage - Supply
8 V ~ 9 V
Operating Temperature
-40°C ~ 85°C
Bus Type
I2C
Maximum Agc
14 dB
Maximum Frequency
288 MHz, 108 MHz
Minimum Frequency
144 MHz, 65 MHz
Modulation Technique
AM, FM
Mounting Style
SMD/SMT
Function
Radio
Noise Figure
12.9 dB, 6.9 dB
Operating Supply Voltage
8.5 V
Supply Voltage (min)
8 V
Supply Voltage (max)
9 V
Minimum Operating Temperature
- 40 C
Maximum Operating Temperature
+ 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Frequency
-
Sensitivity
-
Memory Size
-
Data Rate - Maximum
-
Lead Free Status / Rohs Status
Compliant
Other names
935278526557
TEF6730HW/V1
TEF6730HW/V1
Philips Semiconductors
TEF6721HL_4
Product data sheet
Fig 6. Read mode
S
8.2.2 Write mode: data byte 0
8.2.3 Write mode: data byte 1
SLAVE ADDRESS R
Table 4:
Table 5:
[1]
[2]
Table 6:
Table 7:
Table 8:
Code
S
Slave address W
Slave address R
ACK-s
ACK-m
NA
Data
P
Address IC address
1
2
3
Bit
7
6 to 0
PLL7
Pin ADDRSEL left open-circuit activates first IC address; R
activates second IC address; R
Read or write bit:
0 = write operation to TEF6721HL
1 = read operation from TEF6721HL.
AF
7
7
1
1
1
Description of I
IC address byte
Format of data byte 0
Description of data byte 0 bits
Format of data byte 1
Symbol
AF
PLL[14:8]
ACK-s
PLL14
PLL6
6
6
1
1
1
Rev. 04 — 20 December 2005
[1]
Description
START condition
see
see
acknowledge generated by the slave
acknowledge generated by the master
not acknowledge generated by the master
data byte
STOP condition
Description
Alternative frequency. If AF = 0, then normal operation. If AF = 1, then
AF (RDS) update mode.
Setting of programmable counter of synthesizer PLL. Upper byte of
PLL divider word.
(n
PLL13
PLL5
2
Table 5
Table 5
C-bus format
1 bytes
5
5
DATA
data transferred
ext
0
0
0
= 33 k at pin ADDRSEL to ground activates third IC address.
acknowledge)
PLL12
PLL4
4
4
0
0
0
ACK-m
PLL11
PLL3
Car radio tuner front-end for digital IF
3
3
0
0
0
ext
= 120 k at pin ADDRSEL to ground
DATA
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
PLL10
PLL2
0
0
1
2
2
TEF6721HL
1
0
0
PLL9
PLL1
1
1
NA
001aad049
P
Mode
R/W
R/W
R/W
PLL8
PLL0
12 of 48
0
0
[2]

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