ATA5811-PLHC Atmel, ATA5811-PLHC Datasheet - Page 31
![IC TXRX UHF ASK/FSK 1CH 48-QFN](/photos/7/34/73471/48-vqfn-6_543-5130_01-4_sml.jpg)
ATA5811-PLHC
Manufacturer Part Number
ATA5811-PLHC
Description
IC TXRX UHF ASK/FSK 1CH 48-QFN
Manufacturer
Atmel
Datasheet
1.ATA5811-PLHC.pdf
(92 pages)
Specifications of ATA5811-PLHC
Frequency
433MHz, 868MHz
Data Rate - Maximum
20kbps
Modulation Or Protocol
ASK, FSK
Applications
Access Control, AMR, RKE
Power - Output
5dBm
Sensitivity
-116dBm
Voltage - Supply
2.4 V ~ 3.6 V or 4.4 V ~ 6 V
Current - Receiving
10.5mA
Current - Transmitting
16mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Memory Size
-
Other names
ATA5811-PLHCTR
ATA5811-PLQ
ATA5811-PLQTR
ATA5811-PLQTR
ATA5811-PLQ
ATA5811-PLQTR
ATA5811-PLQTR
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Figure 7-3.
4689F–RKE–08/06
V
V
Thres_2
Thres_1
(Control Register 3)
DVCC_RESET
(Status Register)
Reset Timing
= 2.38V (typ)
VSOUT_EN
= 2.3V (typ)
N_RESET
LOW_Batt
VSOUT
(AVCC)
DVCC
CLK
The status bit Low_Batt is set to 1 if the voltage at pin VSOUT V
ically 2.38V). Low_Batt is set to 0 if V
the 4-wire serial interface or N_RESET is set to low.
If V
trol register 3 is 1, a DVCC_RESET is also generated. If V
connected microcontroller by setting bit VSOUT_EN = 0, no DVCC_RESET is generated.
Note:
VSOUT
If VSOUT < V
is disabled and the transceiver is not programmable via the 4-wire serial interface.
drops below V
1.5V (typically)
V
SOUT
V
SOUT
> 2.3V and the XTO is running
Thres_1
> 2.38V and the XTO is running
Thres_1
(typically 2.3V) the output of the pin CLK is low, the Microcontroller_Interface
(typically 2.3V), N_RESET is set to low. If bit VSOUT_EN in con-
VSOUT
exceeds V
Thres_2
ATA5811/ATA5812
and the status register is read via
VSOUT
VSOUT
was prior disabled by the
drops below V
Thres_2
(typ-
31
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