ATMEGA64RZAV-10PU Atmel, ATMEGA64RZAV-10PU Datasheet - Page 301
ATMEGA64RZAV-10PU
Manufacturer Part Number
ATMEGA64RZAV-10PU
Description
MCU ATMEGA644/AT86RF230 40-DIP
Manufacturer
Atmel
Series
ATMEGAr
Datasheets
1.ATMEGA644-20MU.pdf
(23 pages)
2.ATMEGA644-20MU.pdf
(376 pages)
3.AT86RF230-ZU.pdf
(98 pages)
Specifications of ATMEGA64RZAV-10PU
Frequency
2.4GHz
Modulation Or Protocol
802.15.4 Zigbee
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
64kB Flash, 2kB EEPROM, 4kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
40-DIP (0.600", 15.24mm)
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Applications
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega64
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25.9
Table 25-17. Serial Programming Instruction Set (Hexadecimal values)
2593N–AVR–07/10
Instruction/Operation
Programming Enable
Chip Erase (Program Memory/EEPROM)
Poll RDY/BSY
Load Instructions
Load Extended Address byte
Load Program Memory Page, High byte
Load Program Memory Page, Low byte
Load EEPROM Memory Page (page access)
Read Instructions
Read Program Memory, High byte
Read Program Memory, Low byte
Read EEPROM Memory
Read Lock bits
Read Signature Byte
Read Fuse bits
Read Fuse High bits
Read Extended Fuse Bits
Read Calibration Byte
Write Instructions
Write Program Memory Page
Write EEPROM Memory
Serial Programming Instruction set
7. At the end of the programming session, RESET can be set high to commence normal
8. Power-off sequence (if needed):
Table 25-16. Minimum Wait Delay Before Writing the Next Flash or EEPROM Location
Table 25-17 on page 301
(1)
Symbol
t
t
t
WD_FLASH
WD_EEPROM
WD_ERASE
stored until the command is re-issued, that is, the command needs only be issued for the
first page, and when crossing the 64KWord boundary.
operation.
Set RESET to “1”.
Turn V
CC
power off.
Byte 1
$AC
$AC
$4D
$C1
$A0
$4C
$C0
$F0
$48
$40
$28
$20
$58
$30
$50
$58
$50
$38
and
Figure 25-11 on page 302
0000 00aa
0000 00aa
adr MSB
adr MSB
adr MSB
Byte 2
$53
$80
$00
$00
$00
$00
$00
$00
$00
$00
$08
$08
$00
Instruction Format
Minimum Wait Delay
describes the Instruction set.
Extended adr
0000 000aa
0000 000aa
aaaa aaaa
aaaa aaaa
4.5 ms
9.0 ms
9.0 ms
adr LSB
adr LSB
adr LSB
adr LSB
adr LSB
Byte 3
$00
$00
$00
$00
$00
$00
$00
$00
ATmega644
high data byte out
low data byte out
high data byte in
low data byte in
data byte out
data byte out
data byte out
data byte out
data byte out
data byte out
data byte out
data byte out
data byte in
data byte in
Byte 4
$00
$00
$00
$00
301
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