ATMEGA128RZBV-8AU Atmel, ATMEGA128RZBV-8AU Datasheet - Page 90
ATMEGA128RZBV-8AU
Manufacturer Part Number
ATMEGA128RZBV-8AU
Description
MCU ATMEGA1280/AT86RF230 100TQFP
Manufacturer
Atmel
Series
ATMEGAr
Datasheets
1.ATMEGA640V-8CU.pdf
(38 pages)
2.ATMEGA640V-8CU.pdf
(444 pages)
3.AT86RF230-ZU.pdf
(98 pages)
Specifications of ATMEGA128RZBV-8AU
Frequency
2.4GHz
Data Rate - Maximum
2Mbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
General Purpose
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Data Interface
PCB, Surface Mount
Memory Size
128kB Flash, 4kB EEPROM, 8kB RAM
Antenna Connector
PCB, Surface Mount
Package / Case
100-TQFP
Wireless Frequency
2.4 GHz
Interface Type
JTAG, SPI
Output Power
3 dBm
For Use With
ATAVRISP2 - PROGRAMMER AVR IN SYSTEMATSTK501 - ADAPTER KIT FOR 64PIN AVR MCUATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Operating Temperature
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
ATmega128
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12.3.7
2549M–AVR–09/10
Alternate Functions of Port G
Table 12-19. Overriding Signals for Alternate Functions in PF7:PF4
Table 12-20. Overriding Signals for Alternate Functions in PF3:PF0
The Port G alternate pin configuration is as follows:
Table 12-21. Port G Pins Alternate Functions
DIEOE
DIEOV
Signal
PUOE
PUOV
DDOE
DDOV
Name
PVOE
PVOV
AIO
Signal Name
DI
Port Pin
DIEOE
DIEOV
DDOE
PUOE
PUOV
DDOV
PVOE
PVOV
PG5
PG4
PG3
PG2
PG1
PG0
AIO
DI
TDI/ADC7 INPUT
PF7/ADC7/TDI
JTAGEN
JTAGEN
JTAGEN
1
0
0
0
0
–
ADC3 INPUT
PF3/ADC3
OC0B (Output Compare and PWM Output B for Timer/Counter0)
0
0
0
0
0
0
0
0
–
ATmega640/1280/1281/2560/2561
PF6/ADC6/TDO
ALE (Address Latch Enable to external memory)
ADC6 INPUT
SHIFT_IR +
SHIFT_DR
JTAGEN
JTAGEN
JTAGEN
JTAGEN
TOSC1 (RTC Oscillator Timer/Counter2)
TOSC2 (RTC Oscillator Timer/Counter2)
WR (Write strobe to external memory)
RD (Read strobe to external memory)
TDO
0
0
–
ADC2 INPUT
PF2/ADC2
0
0
0
0
0
0
0
0
–
Alternate Function
TMS/ADC5 INPUT
PF5/ADC5/TMS
JTAGEN
JTAGEN
JTAGEN
ADC1 INPUT
PF1/ADC1
1
0
0
0
0
–
0
0
0
0
0
0
0
0
–
TCK/ADC4 INPUT
PF4/ADC4/TCK
ADC0 INPUT
PF0/ADC0
JTAGEN
JTAGEN
JTAGEN
1
0
0
0
0
–
0
0
0
0
0
0
0
0
–
90
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