SI4420-D1-FT Silicon Laboratories Inc, SI4420-D1-FT Datasheet - Page 22

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SI4420-D1-FT

Manufacturer Part Number
SI4420-D1-FT
Description
IC TXRX FSK 915MHZ 5.4V 16-TSSOP
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SI4420-D1-FT

Package / Case
16-TSSOP
Frequency
315MHz, 433MHz, 868MHz, and 915MHz
Data Rate - Maximum
256kbps
Modulation Or Protocol
FSK
Power - Output
-21dbm
Sensitivity
-109dBm
Voltage - Supply
2.2 V ~ 5.4 V
Current - Receiving
15mA
Current - Transmitting
26mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Number Of Receivers
2
Number Of Transmitters
2
Wireless Frequency
315 MHz to 915 MHz
Interface Type
SPI
Output Power
4 dBm to 8 dBm
Operating Supply Voltage
2.2 V to 5.4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Maximum Supply Current
25 mA
Minimum Operating Temperature
- 40 C
Modulation
FSK
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Applications
-
Memory Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1630-5

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SI4420-D1-FT
Manufacturer:
SILICON
Quantity:
1 300
15. Status Read Command
The read command starts with a zero, whereas all other control commands start with a one. If a read command is identified, the status bits
will be clocked out on the SDO pin as follows:
Status Register Read Sequence with FIFO Read Example:
RGIT
FFIT
POR
RGUR
FFOV
WKUP
EXT
LBD
FFEM
ATS
RSSI
DQD
CRL
ATGL
OFFS(6)
OFFS(3) -OFFS(0)
TX register is ready to receive the next byte (Can be cleared by Transmitter Register Write Command)
The number of data bits in the RX FIFO has reached the pre-programmed limit (Can be cleared by any of the
FIFO read methods)
Power-on reset (Cleared after Status Read Command)
TX register under run, register over write (Cleared after Status Read Command)
RX FIFO overflow (Cleared after Status Read Command)
Wake-up timer overflow (Cleared after Status Read Command)
Logic level on interrupt pin (pin 16) changed to low (Cleared after Status Read Command)
Low battery detect, the power supply voltage is below the pre-programmed limit
FIFO is empty
Antenna tuning circuit detected strong enough RF signal
The strength of the incoming signal is above the pre-programmed limit
Data quality detector output
Clock recovery locked
Toggling in each AFC cycle
MSB of the measured frequency offset (sign of the offset value)
Offset value to be added to the value of the frequency control parameter (Four LSB bits)
Si4420
22

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