ATA5429-PLSW Atmel, ATA5429-PLSW Datasheet - Page 38
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ATA5429-PLSW
Manufacturer Part Number
ATA5429-PLSW
Description
IC TXRX ASK/FSK 915MHZ 48QFN
Manufacturer
Atmel
Specifications of ATA5429-PLSW
Frequency
915MHz
Data Rate - Maximum
20kbps
Modulation Or Protocol
ASK, FSK
Applications
Alarm, ISM, Telemetry
Power - Output
5dBm
Sensitivity
-112.5dBm
Voltage - Supply
2.4 V ~ 3.6 V or 4.4 V ~ 6.6 V
Current - Receiving
10.5mA
Current - Transmitting
10mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Operating Temperature
-40°C ~ 85°C
Package / Case
48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Product Depth (mm)
7mm
Product Height (mm)
0.9mm
Product Length (mm)
7mm
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Size
-
Lead Free Status / Rohs Status
Compliant
7.3
7.3.1
38
Control Register
ATA5423/ATA5425/ATA5428/ATA5429
Control Register 1 (ADR 0)
To use the transceiver in different applications, it can be configured by a connected microcon-
troller via the 4-wire serial interface.
Table 7-1.
Table 7-2.
Table 7-3.
Table 7-4.
Table 7-5.
IR1
IR1
OPM1
0
0
1
1
0
0
1
1
AVCC_EN
0
0
1
1
FS
0
1
0
1
IR0
IR0
0
1
0
1
0
1
0
1
OPM0
Function (RX Mode)
Pin IRQ is set to “1” if 4 received bytes are in the TX/RX data buffer or a receiving error
occurred
Pin IRQ is set to “1” if 8 received bytes are in the TX/RX data buffer or a receiving error
occurred
Pin IRQ is set to “1” if 12 received bytes are in the TX/RX data buffer or a receiving error
occurred (default)
Pin IRQ is set to “1” if a receiving error occurred
Function (TX Mode)
Pin IRQ is set to “1” if 4 bytes remain in the TX/RX data buffer or the TX data buffer is empty
Pin IRQ is set to “1” if 8 bytes remain in the TX/RX data buffer or the TX data buffer is empty
Pin IRQ is set to “1” if 12 bytes remain in the TX/RX data buffer or the TX data buffer is
empty (default)
Pin IRQ is set to “1” if the TX data buffer is empty
Control Register 1 (Function of Bit 7 and Bit 6 in RX Mode)
Control Register 1 (Function of Bit 7 and Bit 6 in TX Mode)
Control Register 1 (Function of Bit 5)
Control Register 1 (Function of Bit 4)
Control Register 1 (Function of Bit 2 and Bit 1)
0
1
0
1
(default)
Enables AVCC, if the ATA5423/ATA5425 is in AUX mode
Selected frequency 345/433/868/915 MHz (default)
Selected frequency 315 MHz
Function
Function (RX Mode, TX Mode)
Function
IDLE mode (default)
TX mode
RX polling mode
RX mode
4841D–WIRE–10/07