ATMEGA2561R231-MU Atmel, ATMEGA2561R231-MU Datasheet - Page 253

• Manufacturer Part Number: ATMEGA2561R231-MU
• Description: BUNDLE ATMEGA2561/RF231 QFN
• Manufacturer: Atmel

Specifications of ATMEGA2561R231-MU

• Frequency: 2.4GHz
• Modulation Or Protocol: 802.15.4 Zigbee, 6LoWPAN, RF4CE, SP100, WirelessHART™, ISM
• Data Interface: PCB, Surface Mount
• Memory Size: 256kB Flash, 4kB EEPROM, 8kB RAM
• Antenna Connector: PCB, Surface Mount
• Package / Case: 64-QFN, 32-QFN
• Processor Series: ATMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 8 KB
• Development Tools By Supplier: ATAVRRZ541, ATAVRRAVEN, ATAVRRZUSBSTICK, ATAVRISP2, ATAVRRZ201
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Power - Output: -
• Operating Temperature: -
• Applications: -
• Sensitivity: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / Rohs Status: Details

23.7.1
2549M–AVR–09/10
Master Transmitter Mode
In the Master Transmitter mode, a number of data bytes are transmitted to a Slave Receiver
(see
The format of the following address packet determines whether Master Transmitter or Master
Receiver mode is to be entered. If SLA+W is transmitted, MT mode is entered, if SLA+R is trans-
mitted, MR mode is entered. All the status codes mentioned in this section assume that the
prescaler bits are zero or are masked to zero.
Figure 23-11. Data Transfer in Master Transmitter Mode
A START condition is sent by writing the following value to TWCR:
TWEN must be set to enable the 2-wire Serial Interface, TWSTA must be written to one to trans-
mit a START condition and TWINT must be written to one to clear the TWINT Flag. The TWI will
then test the 2-wire Serial Bus and generate a START condition as soon as the bus becomes
free. After a START condition has been transmitted, the TWINT Flag is set by hardware, and the
status code in TWSR will be 0x08 (see
SLA+W must be transmitted. This is done by writing SLA+W to TWDR. Thereafter the TWINT bit
should be cleared (by writing it to one) to continue the transfer. This is accomplished by writing
the following value to TWCR:
When SLA+W have been transmitted and an acknowledgement bit has been received, TWINT is
set again and a number of status codes in TWSR are possible. Possible status codes in Master
mode are 0x18, 0x20, or 0x38. The appropriate action to be taken for each of these status codes
is detailed in
When SLA+W has been successfully transmitted, a data packet should be transmitted. This is
done by writing the data byte to TWDR. TWDR must only be written when TWINT is high. If not,
the access will be discarded, and the Write Collision bit (TWWC) will be set in the TWCR Regis-
ter. After updating TWDR, the TWINT bit should be cleared (by writing it to one) to continue the
transfer. This is accomplished by writing the following value to TWCR:
TWCR
value
TWCR
value
TWCR
value
Figure
SDA
SCL
23-11). In order to enter a Master mode, a START condition must be transmitted.
Table 23-2 on page
TWINT
TWINT
TWINT
1
1
1
TRANSMITTER
Device 1
MASTER
TWEA
TWEA
TWEA
X
X
X
Device 2
RECEIVER
ATmega640/1280/1281/2560/2561
SLAVE
254.
TWSTA
TWSTA
TWSTA
1
0
0
Table 23-2 on page
Device 3
TWSTO
TWSTO
TWSTO
0
0
0
........
TWWC
TWWC
TWWC
Device n
X
X
X
254). In order to enter MT mode,
V
CC
TWEN
TWEN
TWEN
1
1
1
R1
R2
–
0
–
0
–
0
TWIE
TWIE
TWIE
X
X
X
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