ATZB-24-A2 Atmel, ATZB-24-A2 Datasheet - Page 43

KIT MOD 802.15.4/ZIGB 2.4GHZ ANT

ATZB-24-A2

Manufacturer Part Number
ATZB-24-A2
Description
KIT MOD 802.15.4/ZIGB 2.4GHZ ANT
Manufacturer
Atmel
Datasheets

Specifications of ATZB-24-A2

Frequency
2.4GHz
Data Rate - Maximum
250kbps
Modulation Or Protocol
802.15.4 Zigbee
Applications
Home/Building Automation, Industrial Control and Monitoring
Power - Output
3dBm
Sensitivity
-101dBm
Voltage - Supply
1.8 V ~ 3.6 V
Current - Receiving
19mA
Current - Transmitting
18mA
Data Interface
PCB, Surface Mount
Memory Size
128kBytes Flash, 8kBytes RAM, 4kBytes EEPROM
Antenna Connector
On-Board, Chip
Operating Temperature
-40°C ~ 85°C
Package / Case
Module
Tool Type
Wireless Development Kit
Core Architecture
AVR
Cpu Core
AVR 8
Data Bus Width
8 bit
Description/function
ZigBit 2.4 GHz Dual Chip Antenna
Wireless Frequency
2.4 GHz
Interface Type
UART, I2C, SPI
Operating Voltage
1.8 V to 3.6 V
Output Power
3 dBm
Antenna
Chip Antenna
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATZB-24-A2
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATZB-24-A2R
Manufacturer:
CIRRUS
Quantity:
201
26. DAC - 12-bit Digital to Analog Converter
26.1
26.2
8069Q–AVR–12/10
Features
Overview
The XMEGA A4 devices feature one 12-bit, 1 Msps DAC with built-in offset and gain calibration,
see
A DAC converts a digital value into an analog signal. The DAC may use an internal 1.0 voltage
as the upper limit for conversion, but it is also possible to use the supply voltage or any applied
voltage in-between. The external reference input is shared with the ADC reference input.
Figure 26-1. DAC overview
The DAC has one continuous output with high drive capabilities for both resistive and capacitive
loads. It is also possible to split the continuous time channel into two Sample and Hold (S/H)
channels, each with separate data conversion registers.
A DAC conversion may be started from the application software by writing the data conversion
registers. The DAC can also be configured to do conversions triggered by the Event System to
have regular timing, independent of the application software. DMA may be used for transferring
data from memory locations to DAC data registers.
The DAC has a built-in calibration system to reduce offset and gain error when loading with a
calibration value from software.
PORTB has one DAC. Notation of this peripheral is DACB.
One DAC with 12-bit resolution
Up to 1 Msps conversion rate
Flexible conversion range
Multiple trigger sources
1 continuous output or 2 Sample and Hold (S/H) outputs
Built-in offset and gain calibration
High drive capabilities
Low Power Mode
Figure 26-1 on page
Channel A
Channel B
Register
Register
43.
Reference selection
Configuration
Trigger
DAC
Event
Channel A
Channel B
XMEGA A4
43

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