SI4200-GM Silicon Laboratories Inc, SI4200-GM Datasheet
SI4200-GM
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SI4200-GM Summary of contents
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... Quad-band support: GSM 850 Class 4, small MS E-GSM 900 Class 4, small MS DCS 1800 Class 1 PCS 1900 Class 1 GPRS Class 12 compliant CMOS process technology Low profile packages: Si4200 MLP32 Si4201 MLP20 Si4134T MLP32 3-wire serial interface 2 3.0 V operation Si4200 Si4201 PGA ADC PGA ...
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Aero+ 2 Rev. 1.2 ...
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... Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 XDRV Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 XOUT Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Pin Descriptions: Si4200- .38 Pin Descriptions: Si4200DB- Pin Descriptions: Si4201- .40 Pin Descriptions: Si4134T- Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Package Outline: Si4200-BM and Si4200DB- Package Outline: Si4201- .44 Package Outline: Si4134T- Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46 Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48 Rev. 1.2 Aero+ Page 3 ...
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... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2. The Si4200 and Si4134T devices are high-performance RF integrated circuits with an ESD rating of < 2 kV. Handling and assembly of these devices should only be done at ESD-protected workstations. ...
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... Table 3. DC Characteristics (V = 2 – ° Parameter Si4200 Supply Current 1 Si4201 Supply Current 2 Si4134T Supply Current Total Chipset Supply Current 3 High Level Input Voltage 3 Low Level Input Voltage 3 High Level Input Current 3 Low Level Input Current 4 High Level Output Voltage ...
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Aero+ Table 4. AC Characteristics (V = 2 – ° Parameter SCLK Cycle Time SCLK Rise Time SCLK Fall Time SCLK High Time SCLK Low Time PDN Rise Time PDN Fall ...
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D17 D16 SDI 50% 20 HOLD 80% SCLK 50% 20 EN1 CLK 80% SEN 50% 20% Figure 3. Serial Interface Write Timing Diagram 80% A0 SDI 50% 20% 80% SDO ...
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Aero+ Table 5. Receiver Characteristics (V = 2 – ° Parameter 1 GSM Input Frequency 1 DCS or PCS Input Frequency 2,3 Noise Figure ° 2,3 Noise Figure ...
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... Powerup Settling Time Notes: 1. GSM input pins RFIGP and RFIGN. DCS input pins RFIDP and RFIDN. PCS input pins RFIPP and RFIPN. On the Si4200DB, the PCS input should be used for either PCS 1900 or DCS 1800 bands. 2. Measurement is performed with a 2:1 balun (50 Ω input, 200 Ω balanced output) and includes matching network and PCB losses. ...
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Aero+ −20 −40 −60 −80 −100 −120 Figure 5. Receive Path Magnitude Response (CSEL = −2 −4 −6 −8 −10 −12 −14 −16 Figure 6. Receive Path Passband Magnitude Response (CSEL = ...
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Receive Path Magnitude Response (CSEL = 1) 0 −20 −40 −60 − 100 150 Figure 8. Receive Path Magnitude Response (CSEL = 1) Receive Path Passband Magnitude Response (CSEL = −2 −4 −6 −8 −10 ...
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Aero+ Table 6. Transmitter Characteristics (V = 2 – ° Parameter 1 RFOG Output Frequency 2 RFOD Output Frequency 3,4 I/Q Differential Input Swing 3 I/Q Input Common-Mode 3,4 I/Q Differential ...
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Table 6. Transmitter Characteristics (Continued 2 – ° Parameter 1,2 RF Output Harmonic Suppression 5,8 Powerup Settling Time Notes: 1. Measured at RFOG pin. 2. Measured at RFOD pin. ...
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Aero+ Table 7. Frequency Synthesizer Characteristics (V = 2 – ° Parameter 1 RF1 VCO Frequency 1 RF2 VCO Frequency 1 IF VCO Frequency RF1 PLL Phase Detector Update Frequency IF ...
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... IF PLL Spurious Notes: 1. For the GSM input, the RF1 VCO is divided by two on the Si4200. During transmit, the IF VCO is divided by two on the Si4200. These tuning ranges are guaranteed provided the VCOs on the Si4134T are properly centered during the PC board design phase. See “AN49: Aero Transceiver PCB Layout Guidelines” for more information. ...
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... DD 3. For dual-band designs, the DCS LNA input pins (U1 pins 19–20) should be grounded. For a complete pinout, see "Pin Descriptions: Si4200DB-BM" on page 39. 4. See “AN49: Aero Transceiver PCB Layout Guidelines” for details on the following: LNA matching network (C1–C6, L1–L3). Values should be custom tuned for a specific PCB layout and SAW filter to optimize performance. Differential traces between the SAW filters (Z1– ...
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... Murata LQW15A series (0402 size) Murata LQW18AN series (0603 size) Murata LQW15A series (0402 size) Murata LQW18AN series (0603 size) Murata LQW15A series (0402 size) Multi-layer (0402 or 0603 size) PCB Trace Silicon Laboratories Si4200-BM Silicon Laboratories Si4201-BM Silicon Laboratories Si4134T-BM = 8.0 pF KDS BR13000AA0E L KSS CX96FFFBQAJ13 EPCOS B39881-B7719-C610 (6-pin, 2 ...
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... The Aero+ transceiver is the industry’s most integrated RF front end for multi-band GSM/GPRS digital cellular handsets and wireless data modems. The chipset consists of the Si4200 GSM transceiver, Si4201 universal baseband interface, and Si4134T dual RF synthesizer with an integrated digitally-controlled crystal oscillator (DCXO). The highly integrated solution ...
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... LNAG[1:0] and LNAC[1:0] bits in register 05h. A quadrature image-reject mixer downconverts the RF signal to a 100 kHz intermediate frequency (IF) with the RFLO from the Si4134T frequency synthesizer. The RFLO frequency is between 1737.8 and 1989.9 MHz, and is divided by two in the Si4200 for GSM 850 and E- Si4200 PGA ADC PGA ...
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... RFLO, high-side injection is used for the GSM 850 and E-GSM 900 bands, and low-side injection is used for the DCS 1800 and PCS 1900 bands. The I and Q signals are automatically swapped within the Si4200 when switching bands. Additionally, the SWAP bit in register 03h can be used to manually exchange the I and Q signals ...
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... VCO dividers, and phase detectors. Differential outputs for the IF and RF PLLs are provided for direct connection to the Si4200 transceiver IC. The RF PLL uses two multiplexed VCOs. The RF1 VCO is used for receive mode, and the RF2 VCO is used for transmit mode. The IF PLL is used only during transmit mode and uses a single VCO ...
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Aero+ VCO Inductor Design C VAR PLL Determining L EXT The center frequencies for the RF2, and IF VCOs in the Si4134T are set using an external inductance (L is very important that L be properly designed to EXT ensure ...
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DCXO Overview The Si4134T integrates the DCXO circuitry required to generate a precise system reference clock using only an external crystal resonator. (See Figure 16.) An internal digitally programmable capacitor array (CDAC) provides a coarse method of adjusting the reference ...
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... Figure 17. Serial Interface Format The serial interface pins are intended to be connected in parallel to both the Si4201 and the Si4134T. Serial control is relayed from the Si4201 to the Si4200 over the signal interface (IOP/ION and CKP/CKN pins). All registers must be written when the PDN pin is asserted (low), except for Register 22h ...
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... Control Registers Reg Name D17 D16 D15 D14 D13 D12 D11 D10 D9 Si4200 00h Revision/Read 01h Reset 02h Mode 03h Config 04h Transmit 05h Receive Si4201 10h Revision/Read 11h Config 12h DAC Config 19h Reserved 20h RX Master #1 RXBAND[1:0] 21h RX Master #2 0 DPDS[2:0] ...
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... D17 D16 D15 D14 D13 D12 D11 D10 Name Bit Name 17:8 Reserved 7:0 REV0[7:0] Note: Registers on the Si4200 can be read by writing this register with the address of the register to be read. Register 01h. Reset (Si4200/Si4201) Bit D17 D16 D15 D14 D13 D12 D11 D10 D9 Name Bit Name 17:1 ...
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... Register 02h. Mode Control (Si4200/Si4201) Bit D17 D16 D15 D14 D13 D12 D11 D10 Name Bit Name 17:3 Reserved 2 AUTO 1:0 MODE[1:0] Note: Calibration must be performed each time the power supply is applied. To initiate the calibration mode, set MODE[1:0] = 10, and pulse the PDN pin high for at least 150 µs. ...
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... Aero+ Register 03h. Configuration (Si4200) Bit D17 D16 D15 D14 D13 D12 D11 D10 Name DIAG[1:0] Bit Name 17:14 Reserved 13:12 DIAG[1:0] 11 SWAP 10:8 Reserved 7:6 TXBAND[1:0] 5:4 RXBAND[1:0] 3:2 Reserved 1 Reserved 0 Reserved SWAP TXBAND[1:0] Function Program to zero. DIAG1/DIAG2 Output Select. ...
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... Register 04h. Transmit Control (Si4200) Bit D17 D16 D15 D14 D13 D12 D11 D10 Name Bit Name 17:11 Reserved 10 Reserved 9:8 BBG[1:0] 7:4 FIF[3:0] 3:0 Reserved BBG[1:0] Function Program to zero. Program to one. TX Baseband Input Full Scale Differential Input Voltage 1.7 V (default). ...
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... Aero+ Register 05h. Receive Gain (Si4200/Si4201) Bit D17 D16 D15 D14 D13 D12 D11 D10 Name Bit Name 17:14 Reserved 13:8 DGAIN[5:0] 7 Reserved 6:4 AGAIN[2:0] 3:2 LNAC[1:0] 1:0 LNAG[1: DGAIN[5:0] 0 Function Program to zero. Digital PGA Gain Control. 00h = 0 dB (default). 01h = 1 dB. ...
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Register 10h. Revision/Read (Si4201) Bit D17 D16 D15 D14 D13 D12 D11 D10 Name Bit Name 17:8 Reserved 7:0 REV1[7:0] Note: Registers on the Si4201 can be read by writing this register with the address ...
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Aero+ Register 12h. DAC Configuration (Si4201) Bit D17 D16 D15 D14 D13 D12 D11 D10 Name Bit Name 17:11 Reserved 10 Reserved 9 XBUF 8 Reserved 7 ZDBS 6:4 ZERODEL[2:0] 3:2 DACCM[1:0] 1:0 DACFS[1:0] 32 ...
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Register 19h. Reserved (Si4201) Bit D17 D16 D15 D14 D13 D12 D11 D10 Name Bit Name 17:0 Reserved Register 20h. RX Master #1 Bit D17 D16 D15 D14 D13 D12 D11 D10 Name RXBAND[1:0] Notes: ...
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Aero+ Register 24h. TX Master #2 Bit D17 D16 D15 D14 D13 D12 D11 D10 Name FIF[3:0] Note: See registers 04h and 35h for bit definitions. Register 28h. CDAC (Si4134T) Bit D17 D16 D15 D14 D13 D12 D11 D10 Name ...
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Register 31h. Main Configuration (Si4134T) Bit D17 D16 D15 D14 D13 D12 D11 D10 D9 Name SDOSEL[3:0] Bit Name 17:15 Reserved 14:11 SDOSEL[3:0] 10:5 Reserved 4 RFUP 3 DIV2 2:0 Reserved ...
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Aero+ Register 32h. Powerdown (Si4134T) Bit D17 D16 D15 D14 D13 D12 D11 D10 D9 Name Bit Name 17:2 Reserved 1 PDIB 0 PDRB Register 33h. RF1 N Divider (Si4134T) Bit D17 D16 D15 D14 ...
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Register 35h Divider (Si4134T) Bit D17 D16 D15 D14 D13 D12 D11 D10 D9 Name 0 0 Bit Name 17:16 Reserved Program to zero. 15:0 N [15:0] N Divider for IF Synthesizer. IF Used for transmit mode. D8 ...
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... Aero+ Pin Descriptions: Si4200-BM Pin Number(s) Name 1, 2 ION, IOP 3, 4 CKN, CKP 5, 6 TXIP, TXIN 7, 8 TXQP, TXQN 9, 10 IFLOP, IFLON 11, 27, 30, GND GND pad 12, 13 RFLOP, RFLON 14, 23, 26 15, 16 DIAG2, DIAG1 17, 18 RFIPP, RFIPN 19, 20 RFIDP, RFIDN 21, 22 RFIGP, RFIGN ...
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... Pin Descriptions: Si4200DB-BM Pin Number(s) Name 1, 2 ION, IOP 3, 4 CKN, CKP 5, 6 TXIP, TXIN 7, 8 TXQP, TXQN 9, 10 IFLOP, IFLON 12, 13 RFLOP, RFLON 14, 23, 26 15, 16 DIAG2, DIAG1 17, 18 RFIPP, RFIPN 21, 22 RFIGP, RFIGN 24 RFOD 25 RFOG 28 PDN 11, 19, 20, 27, 30, GND GND pad ...
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... Receive Q output (differential). Receive I output (differential). Supply voltage. Reference frequency input from crystal oscillator. Clock output to Si4200 (differential). Data input from Si4200 (differential). XOUT pin enable Powerdown input (active low). Serial data output. Serial enable input (active low). Serial clock input. ...
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... XDRVEN 5 XDRV XTAL1 12 XTAL2 13 XTALEN 14 XAFC 15 SEN 16 SCLK 17 SDI 18 SDO 20, 21 RFLC, RFLD 26, 27 RFLON, RFLOP RF PLL output to Si4200 (differential). 29, 30 IFLON, IFLOP 6, 8, 19, 22, 24, GND 25, 32, GND pad IFLB 1 24 IFLA 2 23 PDN 3 22 XDRVEN 4 21 GND PAD XDRV ...
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... Ordering Guide Part Number Description Si4200-BM Tri-Band Transceiver GSM 850 or E-GSM 900, DCS 1800, PCS 1900 Si4200-GM Tri-Band Transceiver GSM 850 or E-GSM 900, DCS 1800, PCS 1900 Si4200DB-BM Dual-Band Aero Transceiver GSM 850/PCS 1900 or E-GSM 900/DCS 1800 Si4200DB-GM Dual-Band Aero Transceiver ...
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... Package Outline: Si4200-BM and Si4200DB-BM Figure 18 illustrates the package details for the Si4200-BM and Si4200DB-BM. Table 12 lists the values for the dimensions shown in the illustration PIN1 ID 0.50 DIA Top View Figure 18. 32-Pin Micro Leadframe Package (MLP) Symbol Millimeters Min Nom A — ...
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Aero+ Package Outline: Si4201-BM Figure 19 illustrates the package details for the Si4201-BM. Table 13 lists the values for the dimensions shown in the illustration PIN1 ID 0.50 DIA Top View Figure 19. 20-Pin ...
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Package Outline: Si4134T-BM Figure 18 illustrates the package details for the Si4134T-BM. Table 12 lists the values for the dimensions shown in the illustration PIN1 ID 0.50 DIA Top View Figure 20. 32-Pin Micro ...
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... Aero+ Document Change List Revision 1.0 to Revision 1.1 This document corresponds to the following: Si4200DB revision E (dual band LNA) or Si4200 revision F (triple band LNA) Si4201 revision C Si4134T revision A "Bill of Materials" on page 17 Updated L1–-L3 with 0402 sizes. "Ordering Guide" on page 42 updated to include lead-free ordering option. ...
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Notes: Rev. 1.2 Aero+ 47 ...
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... Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized application, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages. Silicon Laboratories, Silicon Labs, and Aero are trademarks of Silicon Laboratories Inc. Other products or brand names mentioned herein are trademarks or registered trademarks of their respective holder 48 Rev ...