SI4205-BM Silicon Laboratories Inc, SI4205-BM Datasheet - Page 17

• Manufacturer Part Number: SI4205-BM
• Description: IC TXRX TRI-BAND 32LGA
• Manufacturer: Silicon Laboratories Inc

Specifications of SI4205-BM

• Frequency: 850MHz, 900MHz, 1.8GHz, 1.9GHz
• Modulation Or Protocol: GSM
• Applications: Cellular, GSM Cellular Radio
• Voltage - Supply: 2.7 V ~ 3.3 V
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Package / Case: 32-LGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Power - Output: -
• Operating Temperature: -
• Sensitivity: -
• Memory Size: -
• Data Rate - Maximum: -
• Current - Transmitting: -
• Current - Receiving: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

Receiver
The
architecture which allows for the on-chip integration of
the channel selection filters, eliminating the external RF
image reject filters and the IF SAW filter required in
conventional superheterodyne architectures. Compared
to
architecture has a much greater degree of immunity to
dc offsets, which can arise from RF local oscillator
(RFLO) self-mixing, 2nd-order distortion of blockers,
and device 1/f noise. This relaxes the common-mode
balance requirements on the input SAW filters, and
simplifies PC board design and manufacturing.
Three differential-input LNAs are integrated. The GSM
input supports the GSM 850 (869–894 MHz) or E-
GSM 900 (925–960 MHz) bands. The DCS input
supports the DCS 1800 (1805–1880 MHz) band. The
PCS input supports the PCS 1900 (1930–1990 MHz)
band. For quad-band designs, SAW filters for the
GSM 850 and E-GSM 900 bands should be connected
to a balanced combiner which drives the GSM input for
both bands.
The LNA inputs are matched to the 150 Ω balanced-
output SAW filters through external LC matching
networks. The LNA gain is controlled with the
LNAG[1:0] and LNAC[1:0] bits in register 05h.
A quadrature image-reject mixer downconverts the RF
signal to a 100 kHz intermediate frequency (IF) with the
RFLO from the frequency synthesizer. The RFLO
frequency is between 1737.8 to 1989.9 MHz, and is
internally divided by 2 for GSM 850 and E-GSM 900
modes. The mixer output is amplified with an analog
programmable gain amplifier (PGA), which is controlled
a
GSM
DCS
Aero I
PCS
direct-conversion
transceiver
RXBAND[1:0]
uses
architecture,
LNAC[1:0]
LNAG[1:0]
LNA
LNA
LNA
a
Figure 9. Receiver Block Diagram
low-IF
0/90
PLL
RF
the
AGAIN[2:0]
receiver
PGA
PGA
low-IF
N
RFUP
RF1
Rev. 1.0
[15:0]
ADC
ADC
with the AGAIN[2:0] bits in register 05h. The quadrature
IF signal is digitized with high resolution A/D converters
(ADCs).
The ADC output is downconverted to baseband with a
digital 100 kHz quadrature LO signal. Digital decimation
and IIR filters perform channel selection to remove
blocking and reference interference signals. The
response of the IIR filter is programmable to a high
selectivity setting (CSEL = 0) or a low selectivity setting
(CSEL = 1). The low selectivity filter has a flatter group
delay response which may be desirable where the final
channelization filter is in the baseband chip. After
channel selection, the digital output is scaled with a
digital PGA, which is controlled with the DGAIN[5:0] bits
in register 05h.
The LNAG[1:0], LNAC[1:0], AGAIN[2:0] and DGAIN[5:0]
bits must be set to provide a constant amplitude signal
to the baseband receive inputs. See “AN51: Aero
Transceiver AGC Strategy” for more details.
DACs drive a differential analog signal onto the RXIP,
RXIN, RXQP, and RXQN pins to interface to standard
analog-input baseband ICs. No special processing is
required in the baseband for offset compensation or
extended dynamic range. The receive and transmit
baseband I/Q pins can be multiplexed together into a 4-
wire interface. The common mode level at the receive I
and Q outputs is programmable with the DACCM[1:0]
bits, and the full scale level is programmable with the
DACFS[1:0] bits in register 12h.
100 kHz CSEL
DGAIN[5:0]
PGA
PGA
ZERODEL[2:0]
DACCM[1:0]
DACFS[1:0]
Si4205
DAC
DAC
Q
I
Aero I
17