SI4205-BM Silicon Laboratories Inc, SI4205-BM Datasheet - Page 26
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SI4205-BM
Manufacturer Part Number
SI4205-BM
Description
IC TXRX TRI-BAND 32LGA
Manufacturer
Silicon Laboratories Inc
Datasheet
1.SI4205-BM.pdf
(38 pages)
Specifications of SI4205-BM
Frequency
850MHz, 900MHz, 1.8GHz, 1.9GHz
Modulation Or Protocol
GSM
Applications
Cellular, GSM Cellular Radio
Voltage - Supply
2.7 V ~ 3.3 V
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Package / Case
32-LGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Power - Output
-
Operating Temperature
-
Sensitivity
-
Memory Size
-
Data Rate - Maximum
-
Current - Transmitting
-
Current - Receiving
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
SI4205-BM
Manufacturer:
SILICON
Quantity:
6 119
Company:
Part Number:
SI4205-BMR
Manufacturer:
SILAB
Quantity:
18 603
Aero I
Register 11h. Configuration
26
Name
Bit
17:14
13:11
3:1
Bit
10
9
8
7
6
5
4
0
D17 D16 D15 D14 D13 D12 D11 D10
0
0
DPDS[2:0]
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
0
Name
XPD1
XSEL
CSEL
0
DPDS[2:0]
Program to zero.
Data Path Delayed Start.
111= Use for GSM 850 and GSM 900 bands.
011= Use for DCS 1800 and PCS 1900 bands (default).
Note: Use the recommended setting for each band. Other settings reserved.
Reference Buffer Powerdown.
0 = Reference buffer automatically enabled (default).
1 = Reference buffer disabled.
Note: This bit should be set to 0 during normal operation. To achieve lowest
Program to one.
Reference Frequency Select.
0 = No divider. XIN = 13 MHz (default).
1 = Divide XIN by 2. XIN = 26 MHz.
Note: The internal clock should always be 13 MHz.
Program to zero.
Program to one.
Program to zero.
Program to one.
Program to zero.
Digital IIR Coefficient Select.
0 = High selectivity filter (default).
1 = Low selectivity filter.
powerdown current (I
Register 12h must also be set appropriately.
XPD1
Rev. 1.0
D9
1
XSEL
D8
PDN
D7
0
), this bit should be set to 1. The XBUF bit in
Function
D6
1
D5
0
D4
1
D3
0
D2
0
D1
0
CSEL
D0