RFPIC12F675F-I/SS Microchip Technology, RFPIC12F675F-I/SS Datasheet - Page 58

• Manufacturer Part Number: RFPIC12F675F-I/SS
• Description: IC MCU 1KX14 RF FSK/ASK 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC®r

Specifications of RFPIC12F675F-I/SS

• Package / Case: 20-SSOP
• Frequency: 380MHz ~ 450MHz
• Applications: RKE, Security Systems
• Modulation Or Protocol: ASK, FSK
• Data Rate - Maximum: 40 kbps
• Power - Output: 10dBm
• Current - Transmitting: 14mA
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Memory Size: 1024 x 14 words Flash, 128 x 8 Byte EEPROM, 64 x 8 Byte SRAM
• Voltage - Supply: 2V ~ 5.5V
• Operating Temperature: -40°C ~ 125°C
• Processor Series: RFPIC12F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Interface Type: USB
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 2 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ICE2000, DV164102, AC164101, AC164103
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 4-ch x 10-bit
• Program Memory Type: Flash
• Program Memory Size: 1.75 KB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT20SS-1 - SOCKET TRANSITION 18DIP 20SSOPAC164103 - MODULE RCVR RFPIC 433MHZAC164101 - MODULE TRANSMITTER RFPIC 433MHZDV164102 - KIT DEV RFPICKIT KIT 1AC124002 - MOD SKT PROMATEII 18SOIC/20SSOP
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q3188156

rfPIC12F675
10.1
The configuration bits can be programmed (read as '0'),
or left unprogrammed (read as '1') to select various
device configurations, as shown in Register 10-1.
These bits are mapped in program memory location
2007h.
REGISTER 10-1:
DS70091A-page 56
bit 13
bit 13-12
bit 11-9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
R/P-1 R/P-1
BG1
Configuration Bits
BG0
BG1:BG0: Bandgap Calibration bits for BOD and POR voltage
00 = Lowest bandgap voltage
11 = Highest bandgap voltage
Unimplemented: Read as ‘0’
CPD: Data Code Protection bit
1 = Data memory code protection is disabled
0 = Data memory code protection is enabled
CP: Code Protection bit
1 = Program Memory code protection is disabled
0 = Program Memory code protection is enabled
BODEN: Brown-out Detect Enable bit
1 = BOD enabled
0 = BOD disabled
MCLRE: GP3/MCLR pin function select
1 = GP3/MCLR pin function is MCLR
0 = GP3/MCLR pin function is digital I/O, MCLR internally tied to V
PWRTE: Power-up Timer Enable bit
1 = PWRT disabled
0 = PWRT enabled
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
FOSC2:FOSC0: Oscillator Selection bits
111 = RC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN
110 = RC oscillator: I/O function on GP4/OSC2/CLKOUT pin, RC on GP5/OSC1/CLKIN
101 = INTOSC oscillator: CLKOUT function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN
100 = INTOSC oscillator: I/O function on GP4/OSC2/CLKOUT pin, I/O function on GP5/OSC1/CLKIN
011 = EC: I/O function on GP4/OSC2/CLKOUT pin, CLKIN on GP5/OSC1/CLKIN
010 = HS oscillator: High speed crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN
001 = XT oscillator: Crystal/resonator on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN
000 = LP oscillator: Low power crystal on GP4/OSC2/CLKOUT and GP5/OSC1/CLKIN
Note 1: The Bandgap Calibration bits are factory programmed and must be read and saved prior to erasing
Legend:
P = Programmed using ICSP
R = Readable bit
-n = Value at POR
U-0
—
2: The entire data EEPROM will be erased when the code protection is turned off.
3: The entire program memory will be erased, including OSCCAL value, when the code protection is
4: Enabling Brown-out Detect does not automatically enable Power-up Timer.
5: When MCLR is asserted in INTOSC or RC mode, the internal clock oscillator is disabled.
the device as specified in the rfPIC12F675 Programming Specification. These bits are reflected in
an export of the configuration word. Microchip Development Tools maintain all calibration bits to
factory settings.
turned off.
CONFIG — CONFIGURATION WORD (ADDRESS: 2007h)
U-0
—
U-0
—
(3)
R/P-1
CPD
(2)
W = Writable bit
1 = bit is set
R/P-1
(4)
Preliminary
CP
(5)
BODEN MCLRE PWRTE WDTE F0SC2 F0SC1 F0SC0
R/P-1
Note:
R/P-1
U = Unimplemented bit, read as ‘0’
0 = bit is cleared
memory space. It belongs to the special
configuration
3FFFh), which can be accessed only during
programming. See rfPIC12F675 Program-
ming Specification for more information.
Address 2007h is beyond the user program
(1)
R/P-1
DD
R/P-1
 2003 Microchip Technology Inc.
memory
x = bit is unknown
R/P-1
space
R/P-1
(2000h -
R/P-1
bit 0