PIC18F26K22-I/SO Microchip Technology, PIC18F26K22-I/SO Datasheet - Page 357

• Manufacturer Part Number: PIC18F26K22-I/SO
• Description: IC PIC MCU 64KB FLASH 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F26K22-I/SO

• Core Size: 8-Bit
• Program Memory Size: 64KB (32K x 16)
• Core Processor: PIC
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 19x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (0.300", 7.50mm Width)
• Controller Family/series: PIC18
• No. Of I/o's: 25
• Eeprom Memory Size: 1KB
• Ram Memory Size: 3896Byte
• Cpu Speed: 64MHz
• No. Of Timers: 7
• Processor Series: PIC18F
• Core: PIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 24-9:
REGISTER 24-10: CONFIG7L: CONFIGURATION REGISTER 7 LOW
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7
bit 6
bit 5
bit 4-0
Note 1:
bit 7
Legend:
R = Readable bit
-n = Value when device is unprogrammed
bit 7-4
bit 3
bit 2
bit 1
bit 0
Note 1:
WRTD
R/C-1
U-0
—
This bit is read-only in normal execution mode; it can be written only in Program mode.
Available on PIC18(L)FX5K22 and PIC18(L)FX6K22 devices.
WRTD: Data EEPROM Write Protection bit
1 = Data EEPROM not write-protected
0 = Data EEPROM write-protected
WRTB: Boot Block Write Protection bit
1 = Boot Block not write-protected
0 = Boot Block write-protected
WRTC: Configuration Register Write Protection bit
1 = Configuration registers not write-protected
0 = Configuration registers write-protected
Unimplemented: Read as ‘0’
Unimplemented: Read as ‘0’
EBTR3: Table Read Protection bit
1 = Block 3 not protected from table reads executed in other blocks
0 = Block 3 protected from table reads executed in other blocks
EBTR2: Table Read Protection bit
1 = Block 2 not protected from table reads executed in other blocks
0 = Block 2 protected from table reads executed in other blocks
EBTR1: Table Read Protection bit
1 = Block 1 not protected from table reads executed in other blocks
0 = Block 1 protected from table reads executed in other blocks
EBTR0: Table Read Protection bit
1 = Block 0 not protected from table reads executed in other blocks
0 = Block 0 protected from table reads executed in other blocks
WRTB
R/C-1
U-0
—
CONFIG6H: CONFIGURATION REGISTER 6 HIGH
WRTC
R-1
U-0
—
(1)
U-0
U-0
(1)
(1)
Preliminary
—
—
U = Unimplemented bit, read as ‘0’
C = Clearable only bit
U = Unimplemented bit, read as ‘0’
C = Clearable only bit
EBTR3
R/C-1
U-0
—
PIC18(L)F2X/4XK22
(1)
(1)
EBTR2
R/C-1
U-0
—
(1)
EBTR1
R/C-1
U-0
—
DS41412D-page 357
EBTR0
R/C-1
U-0
—
bit 0
bit 0