AD5235BRU25-RL7 Analog Devices Inc, AD5235BRU25-RL7 Datasheet - Page 12

• Manufacturer Part Number: AD5235BRU25-RL7
• Description: IC DGTL POT DUAL 1024POS 16TSSOP
• Manufacturer: Analog Devices Inc

Specifications of AD5235BRU25-RL7

• Rohs Status: RoHS non-compliant
• Taps: 1024
• Resistance (ohms): 25K
• Number Of Circuits: 2
• Temperature Coefficient: 35 ppm/°C Typical
• Memory Type: Non-Volatile
• Interface: 4-Wire SPI Serial
• Voltage - Supply: 3 V ~ 5.5 V, ±2.25 V ~ 2.75 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP (0.173", 4.40mm Width)
• Number Of Elements: 2
• # Of Taps: 1024
• Resistance (max): 25KOhm
• Power Supply Requirement: Single/Dual
• Interface Type: Serial (4-Wire/SPI)
• Single Supply Voltage (typ): 3.3/5V
• Dual Supply Voltage (typ): ±2.5V
• Single Supply Voltage (min): 3V
• Single Supply Voltage (max): 5.5V
• Dual Supply Voltage (min): ±2.25V
• Dual Supply Voltage (max): ±2.75V
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / RoHS Status: Not Compliant
• Other names: AD5235BRU25-RL7; AD5235BRU25-RL7TR

AD5235
TEST CIRCUITS
Figure 25 to Figure 35 define the test conditions used in the
Specifications section.
5V/DIV
5V/DIV
5V/DIV
*SUPPLY CURRENT RETURNS TO MINIMUM POWER CONSUMPTION, IF
Figure 25. Resistor Position Nonlinearity Error (Rheostat Operation; R-INL, R-DNL)
INSTRUCTION 0 (NOP) IS EXECUTED IMMEDIATELY AFTER INSTRUCTION 1
(READ EEMEM).
Figure 26. Potentiometer Divider Nonlinearity Error (INL, DNL)
V
Figure 23. I
MS2
DD
V+
vs. Time when Restoring Data from EEMEM
A
B
DUT
NC = NO CONNECT
Figure 27. Wiper Resistance
NC
W
A
B
DUT
W
A
B
DUT
V
W
4ms/DIV
W
V
MS1
V
MS
I
W
V+ = V
1LSB = V+/2
R
= V
I
W
W
DD
= [V
V
DD
MS
/R
MS1
NOMINAL
N
– V
MS2
]/I
W
CS
CLK
SDI
I
2mA/DIV
DD
*
Rev. C | Page 12 of 28
0.01
100
V+
0.1
10
1
OFFSET
0
~
OFFSET
GND
V
Figure 28. Power Supply Sensitivity (PSS, PSRR)
GND
DD
128
V
A
A
B
V
Figure 30. Noninverting Gain
IN
256
W
OFFSET BIAS
Figure 24. I
Figure 29. Inverting Gain
V
IN
A
V
OFFSET BIAS
A
DUT
MS
384
CODE (Decimal)
W
DUT
R
AB
WB_MAX
W
B
512
=
B
25kΩ
PSRR (dB) = 20 LOG
PSS (%/%) =
V+ = V
OP279
R
OP279
vs. Code
AB
5V
640
=
DD
5V
250kΩ
±10%
768
ΔV
ΔV
V
T
A
A
DD %
MS %
= V
= 25°C
V
OUT
V
B
OUT
896
(
= OPEN
Δ
ΔV
V
MS
DD
1024
)