NUC120LE3AN Nuvoton Technology Corporation of America, NUC120LE3AN Datasheet - Page 365
![IC MCU 32BIT 128KB FLASH 48LQFP](/photos/28/73/287353/nuc120le3an_sml.jpg)
NUC120LE3AN
Manufacturer Part Number
NUC120LE3AN
Description
IC MCU 32BIT 128KB FLASH 48LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Specifications of NUC120LE3AN
Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
Number Of I /o
31
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
NUC120LE3AN
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
Part Number:
NUC120LE3AN
Manufacturer:
NUVOTON
Quantity:
20 000
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DMA Control Register (DMACTL)
Register
SPI_DMA
Bits
[31:2]
[1]
[0]
31
23
15
7
NuMicro™ NUC100 Series Technical Reference Manual
Offset
SPIx_BA+0x38
Descriptions
Reserved
RX_DMA_GO
TX_DMA_GO
30
22
14
6
R/W
R/W
29
21
13
5
Reserved
Reserved
Receive DMA Start
Set this bit to 1 will start the receive PDMA process. SPI controller will issue
request to PDMA controller automatically.
Hardware will auto clear this bit to 0 after PDMA function done.
Transmit DMA Start
Set this bit to 1 will start the transmit PDMA process. SPI controller will issue
request to PDMA controller automatically.
If using PDMA mode to transfer data, remember not to set GO_BUSY bit of
SPI_CNTRL register. The DMA controller inside SPI controller will set it
automatically whenever necessary.
Hardware will auto clear this bit to 0 after PDMA function done.
Note: In DMA mode, the burst mode is not support.
Description
SPI DMA Mode Control Register
28
20
12
4
- 365 -
Reserved
Reserved
Reserved
27
19
11
3
Publication Release Date: Oct 22, 2010
26
18
10
2
RX_DMA_GO TX_DMA_GO
25
17
9
1
Revision V1.06
Reset Value
0x0000_0000
24
16
8
0
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