ATMEGA32A-MNR Atmel, ATMEGA32A-MNR Datasheet - Page 113

• Manufacturer Part Number: ATMEGA32A-MNR
• Description: IC MCU AVR 32K 16MHZ 44VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA32A-MNR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8155C–AVR–02/11
Table 16-3
PWM mode.
Table 16-3.
Note:
Table 16-4
correct or the phase and frequency correct, PWM mode.
Table 16-4.
Note:
• Bit 3 – FOC1A: Force Output Compare for Compare unit A
• Bit 2 – FOC1B: Force Output Compare for Compare unit B
The FOC1A/FOC1B bits are only active when the WGM13:0 bits specifies a non-PWM mode.
However, for ensuring compatibility with future devices, these bits must be set to zero when
COM1A1/COM1B1
COM1A1/COM1B1
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set. In
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is set.
0
0
1
1
0
0
1
1
this case the compare match is ignored, but the set or clear is done at BOTTOM.
PWM Mode” on page 104.
“Phase Correct PWM Mode” on page 106.
shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the phase
shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the fast
Compare Output Mode, Fast PWM
Compare Output Mode, Phase Correct and Phase and Frequency Correct PWM
(1)
COM1A0/COM1B0
COM1A0/COM1B0
0
1
0
1
0
1
0
1
for more details.
Description
Normal port operation, OC1A/OC1B
disconnected.
WGM13:0 = 15: Toggle OC1A on Compare
Match, OC1B disconnected (normal port
operation).
For all other WGM13:0 settings, normal port
operation, OC1A/OC1B disconnected.
Clear OC1A/OC1B on compare match, set
OC1A/OC1B at BOTTOM,
(non-inverting mode)
Set OC1A/OC1B on compare match, clear
OC1A/OC1B at BOTTOM,
(inverting mode)
Description
Normal port operation, OC1A/OC1B
disconnected.
WGM13:0 = 9 or 14: Toggle OC1A on
Compare Match, OC1B disconnected (normal
port operation).
For all other WGM13:0 settings, normal port
operation, OC1A/OC1B disconnected.
Clear OC1A/OC1B on compare match when
up-counting. Set OC1A/OC1B on compare
match when downcounting.
Set OC1A/OC1B on compare match when up-
counting. Clear OC1A/OC1B on compare
match when downcounting.
(1)
for more details.
ATmega32A
See “Fast
113
See