ATMEGA64L-8AUR Atmel, ATMEGA64L-8AUR Datasheet - Page 159
ATMEGA64L-8AUR
Manufacturer Part Number
ATMEGA64L-8AUR
Description
IC MCU AVR 64K 8MHZ 3V 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA64L-8AUR
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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TCNT2 –
Timer/Counter
Register
2490Q–AVR–06/10
Table 67. Compare Output Mode, Phase Correct PWM Mode
Note:
• Bit 2:0 – CS22:0: Clock Select
The three Clock Select bits select the clock source to be used by the Timer/Counter.
Table 68. Clock Select Bit Description
If external pin modes are used for the Timer/Counter2, transitions on the T2 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
The Timer/Counter Register gives direct access, both for read and write operations, to the
Timer/Counter unit 8-bit counter. Writing to the TCNT2 Register blocks (removes) the Compare
Match on the following timer clock. Modifying the counter (TCNT2) while the counter is running,
introduces a risk of missing a Compare Match between TCNT2 and the OCR2 Register.
Bit
0x24 (0x44)
Read/Write
Initial Value
COM21
CS22
0
0
0
0
1
1
1
1
0
0
1
1
1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the Compare
COM20
CS21
Match is ignored, but the set or clear is done at TOP. See
153
0
0
1
1
0
0
1
1
0
1
0
1
R/W
for more details.
7
0
CS20
Description
Normal port operation, OC2 disconnected.
Reserved
Clear OC2 on Compare Match when up-counting. Set OC2 on Compare
Match when downcounting.
Set OC2 on Compare Match when up-counting. Clear OC2 on Compare
Match when downcounting.
0
1
0
1
0
1
0
1
R/W
6
0
Description
No clock source (Timer/counter stopped).
clk
clk
clk
clk
clk
External clock source on T2 pin. Clock on falling edge.
External clock source on T2 pin. Clock on rising edge.
R/W
I/O
I/O
I/O
I/O
I/O
5
0
/(No prescaling)
/8 (From prescaler)
/64 (From prescaler)
/256 (From prescaler)
/1024 (From prescaler)
R/W
4
0
TCNT2[7:0]
R/W
3
0
R/W
2
0
(1)
“Phase Correct PWM Mode” on page
R/W
1
0
ATmega64(L)
R/W
0
0
TCNT2
159
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