AT91SAM7S512B-MU Atmel, AT91SAM7S512B-MU Datasheet - Page 30
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AT91SAM7S512B-MU
Manufacturer Part Number
AT91SAM7S512B-MU
Description
IC MCU ARM7 512K FLASH 64QFN
Manufacturer
Atmel
Series
AT91SAMr
Datasheet
1.AT91SAM7S16-MU.pdf
(51 pages)
Specifications of AT91SAM7S512B-MU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
55MHz
Connectivity
I²C, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
9.2
9.3
30
Clock Generator
Power Management Controller
AT91SAM7S Series Summary
The Clock Generator embeds one low-power RC Oscillator, one Main Oscillator and one PLL
with the following characteristics:
It provides SLCK, MAINCK and PLLCK.
Figure 9-3.
The Power Management Controller uses the Clock Generator outputs to provide:
The Master Clock (MCK) is programmable from a few hundred Hz to the maximum operating fre-
quency of the device.
The Processor Clock (PCK) switches off when entering processor idle mode, thus allowing
reduced power consumption while waiting for an interrupt.
• RC Oscillator ranges between 22 kHz and 42 kHz
• Main Oscillator frequency ranges between 3 and 20 MHz
• Main Oscillator can be bypassed
• PLL output ranges between 80 and 220 MHz
• the Processor Clock PCK
• the Master Clock MCK
• the USB Clock UDPCK (not present on AT91SAM7S32/16)
• all the peripheral clocks, independently controllable
• three programmable clock outputs
Clock Generator Block Diagram
PLLRC
XOUT
XIN
Clock Generator
Management
Embedded
Status
Oscillator
Oscillator
PLL and
Controller
Divider
Main
Power
RC
Control
Slow Clock
SLCK
Main Clock
MAINCK
PLL Clock
PLLCK
6175IS–ATARM–30-Aug-10