MCIMX27MOP4A Freescale Semiconductor, MCIMX27MOP4A Datasheet - Page 58

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MCIMX27MOP4A

Manufacturer Part Number
MCIMX27MOP4A
Description
IC MPU I.MX27 19X19 473MAPBGA
Manufacturer
Freescale Semiconductor
Series
i.MX27r
Datasheets

Specifications of MCIMX27MOP4A

Core Processor
ARM9
Core Size
32-Bit
Speed
400MHz
Connectivity
1-Wire, CAN, EBI/EMI, Ethernet, I²C, MMC, SmartCard, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, LCD, POR, PWM, WDT
Program Memory Type
ROMless
Ram Size
45K x 8
Voltage - Supply (vcc/vdd)
1.38 V ~ 1.52 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
473-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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Electrical Characteristics
4.3.2.2
The transmitter functions correctly up to a FEC_TX_CLK maximum frequency of 25 MHz + 1%. There
is no minimum frequency requirement. In addition, the FEC IPG clock frequency must exceed twice the
FEC_TX_CLK frequency.
Figure 18
58
1
M4
Note:
1
M5
M6
M7
M8
Note:
FEC_RX_DV, FEC_RX_CLK, and FEC_RXD0 have the same timing in 10 Mbps 7-wire interface mode.
ID
FEC_TX_EN, FEC_TX_CLK, and FEC_TXD0 have the same timing in 10 Mbps 7-wire interface mode.
FEC_TXD[3:0] (outputs)
ID
FEC_TX_CLK (input)
FEC_TX_CLK to FEC_TXD[3:0], FEC_TX_EN, FEC_TX_ER invalid
FEC_TX_CLK to FEC_TXD[3:0], FEC_TX_EN, FEC_TX_ER valid
FEC_TX_CLK pulse width high
FEC_TX_CLK pulse width low
shows the MII transmit signal timings, and
FEC_RX_CLK pulse width low
MII Transmit Signal Timing (FEC_TXD[3:0], FEC_TX_EN, FEC_TX_ER,
and FEC_TX_CLK)
FEC_TX_EN
FEC_TX_ER
Table 25. MII Receive Signal Timing Parameters (continued)
Table 26. MII Transmit Signal Timing Parameters
Figure 18. MII Transmit Signal Timing Diagram
Parameter
i.MX27 and i.MX27L Data Sheet, Rev. 1.6
Parameter
1
1
M5
M6
M7
Table 26
lists the timing parameters.
M8
35%
Min
35%
35%
Min
5
65%
Max
Max
65%
65%
20
Freescale Semiconductor
FEC_TX_CLK period
FEC_TX_CLK period
FEC_RX_CLK period
Unit
Unit
ns
ns

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