MCIMX513CJM6CR2 Freescale Semiconductor, MCIMX513CJM6CR2 Datasheet - Page 53
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MCIMX513CJM6CR2
Manufacturer Part Number
MCIMX513CJM6CR2
Description
IC MPU I.MX51 529MABGA
Manufacturer
Freescale Semiconductor
Series
i.MX51r
Datasheet
1.MCIMX512DJM8C.pdf
(200 pages)
Specifications of MCIMX513CJM6CR2
Core Processor
ARM Cortex-A8
Core Size
32-Bit
Speed
600MHz
Connectivity
1-Wire, EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
128
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.8 V ~ 1.15 V
Oscillator Type
External
Operating Temperature
-20°C ~ 85°C
Package / Case
529-LFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
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4.6.7
The following sections provide information on the WEIM.
4.6.7.1
Table 51
Applications Processor Reference Manual (MCIMX51RM) that are the same as those mentioned in this
data sheet.
Freescale Semiconductor
WEIM Chapter Nomenclature
1
2
3
4
Reference Manual
is a guide to help the user identify signals in the WEIM Chapter of the i.MX51 Multimedia
NF21
NF22
t
Asymmetric mode: t
Symmetric mode: t
t
where t
from IO pad to EMI including IO pad delay.
t
Tdl is composed of 4 delay-line units each generates an equal delay with min 1.25 ns and max 1 aclk
period (T
a total of 1 aclk period. T
NF17 is defined only in asymmetric operation mode.
NF17 max value is equivalent to max t
T
NF18 is defined only in Symmetric operation mode.
t
where t
from IO pad to EMI including IO pad delay.
NF18 max value is equivalent to max t
T
DSR
REpd
DSR
DHR
ID
External Interface Module (WEIM)
aclk
aclk
WEIM Signal Cross Reference
is calculated by the following formula:
BEy_B
is “emi_slow_clk” of the system.
is “emi_slow_clk” of the system.
WE_B
can be used to determine t
(MIN) is calculated by the following formula:
OE_B
BCLK
+ t
ADV
CSx
REpd
REpd
Dpd
aclk
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
). Default is 1/4 aclk period for each delay-line unit, so all 4 delay lines together generates
= 11.2 ns (including clock skew)
is RE propogation delay in the chip including IO pad delay, and t
is RE propogation delay in the chip including IO pad delay, and t
WE high to RE low
WE high to busy
Parameter
DSR =
Table 50. NFC—Timing Characteristics (continued)
DSR =
aclk
t
REpd
t
REpd
Table 51. WEIM Signal Cross Reference
is “emi_slow_clk” of the system, which default value is 7.5 ns (133 MHz).
EIM_BCLK
EIM_CSx
EIM_RW
EIM_OE
EIM_EBx
EIM_LBA
+ t
REA
+ t
Dpd
Dpd +
Reference Manual External Signals and Pin Multiplexing Chapter,
max parameter with the following formula: t
– Tdl
RHZ
RHZ
1
/
2
2
T
value that can be used with NFC.
value that can be used with NFC.
Symbol
–
tWHR
tWB
Tdl
and IOMUX Controller Chapter Nomenclature
2
Tdl
Data Sheet Nomenclature,
Asymmetric
2
Mode Min
14T-5.45
–
(t
REpd
—
+ t
Dpd
)
Dpd
Dpd
Symmetric
Mode Min
14T-5.45
is Data propogation delay
REA =
is Data propogation delay
—
1.5T
Electrical Characteristics
–
t
DSR
Max
.
6T
—
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