LAN9500A-ABZJ-TR SMSC, LAN9500A-ABZJ-TR Datasheet - Page 25
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LAN9500A-ABZJ-TR
Manufacturer Part Number
LAN9500A-ABZJ-TR
Description
IC USB 2.0-10/100 ETH CRTL 56QFN
Manufacturer
SMSC
Datasheets
1.LAN9500-ABZJ.pdf
(64 pages)
2.LAN9500A-ABZJ-TR.pdf
(5 pages)
3.LAN9500A-ABZJ-TR.pdf
(2 pages)
Specifications of LAN9500A-ABZJ-TR
Design Resources
LAN9500/A BOM LAN9500/A Schematic
Controller Type
Ethernet Controller, USB 2.0 to 10/100
Interface
USB/Serial
Voltage - Supply
1.2V, 2.5V, 3.3V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
56-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Other names
638-1110-2
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LAN9500A-ABZJ-TR
Manufacturer:
AD
Quantity:
2 251
Part Number:
LAN9500A-ABZJ-TR
Manufacturer:
SMSC
Quantity:
20 000
USB 2.0 to 10/100 Ethernet Controller
Datasheet
Chapter 5 EEPROM Controller (EPC)
SMSC LAN950x Family
5.1
EEPROM ADDRESS
EEPROM Format
00h
01h
02h
03h
04h
05h
06h
07h
08h
LAN950x may use an external EEPROM to store the default values for the USB descriptors and the
MAC address. The EEPROM controller supports most “93C46” type EEPROMs. The EEP_SIZE strap
selects the size of the EEPROM attached to the device. When this strap is set to “0”, a 128 byte
EEPROM is attached and a total of seven address bits are used. When this strap is set to “1” a
256/512 byte EEPROM is attached and a total of nine address bits are used.
Note: A 3-wire style 1K/2K/4K EEPROM that is organized for 128 x 8-bit or 256/512 x 8-bit operation
The MAC address is used as the default Ethernet MAC address and is loaded into the MAC’s ADDRH
and ADDRL registers. If a properly configured EEPROM is not detected, it is the responsibility of the
Host LAN Driver to set the IEEE addresses.
After a system-level reset occurs, the device will load the default values from a properly configured
EEPROM. The device will not accept USB transactions from the Host until this process is completed.
The device’s EEPROM controller also allows the Host system to read, write and erase the contents of
the Serial EEPROM.
Table 5.1
Note the EEPROM offsets are given in units of 16-bit word offsets. A length field with a value of zero
indicates that the field does not exist in the EEPROM. The device will use the field’s HW default value
in this case.
Note: For the device descriptor, the only valid values for the length are 0 and 18.
Note: For the configuration and interface descriptor, the only valid values for the length are 0 and 18.
Note: The EEPROM programmer must ensure that if a string descriptor does not exist in the
Note: If all string descriptor lengths are zero, then a Language ID will not be supported.
must be used.
EEPROM, the referencing descriptor must contain 00h for the respective string index field.
illustrates the format in which data is stored inside of the EEPROM.
0xA5
MAC Address [7:0]
MAC Address [15:8]
MAC Address [23:16]
MAC Address [31:24]
MAC Address [39:32]
MAC Address [47:40]
Full-Speed Polling Interval for Interrupt Endpoint
Hi-Speed Polling Interval for Interrupt Endpoint
Table 5.1 EEPROM Format
DATASHEET
25
EEPROM CONTENTS
Revision 1.0 (05-17-10)