HFIXF1110CC.B3-998844 Cortina Systems Inc, HFIXF1110CC.B3-998844 Datasheet - Page 67

• Manufacturer Part Number: HFIXF1110CC.B3-998844
• Description: IC ETHERNET MAC 10PORT 552-CBGA
• Manufacturer: Cortina Systems Inc

Specifications of HFIXF1110CC.B3-998844

• Controller Type: Ethernet Controller, MAC
• Interface: SPI-4.2
• Voltage - Supply: 1.8 V, 2.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 575-BCBGA Exposed Pad (552 Bumps)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 1008-1010

IXF1110 MAC
Datasheet
250210, Revision 11.0
13 April 2009
5.2.5
5.3
5.3.1
5.3.2
5.3.3
Cortina Systems
check each of the words but only use the first occurrence to clear the DIP-4 error counter.
Any DIP-4 error in any of these words is still counted towards the Loss-of-Sync threshold
counter. It is now impossible to mask the DIP-4 error on our interface.
DC Parameters
For DC parameters on the SPI4-2 interface, please refer to
Table 37 on page
SerDes Interface
Introduction
The IXF1110 MAC has ten integrated Serializer/Deserializer (SerDes) devices that allow
direct connection to optical modules. Each SerDes interface is fully compliant with the
relevant IEEE 802.3 Specifications, including auto-negotiation (see
Operation, on page
the Small Form Factor Pluggable (SFP) Multi-Source Agreement (MSA), see
Optical Module Interface, on page
The following sections describe the operations supported by each SerDes interface, the
configurable options, and register bits that control these options. (A full list of the register
addresses and full bit definitions are found in the Register Map
Map, on page
Features
The SerDes cores are designed to operate in point-to-point data transmission applications.
While the core can be used across various media types, such as PCB or backplanes, it is
configured specifically for use in 1000BASE-X Ethernet fiber applications in the
IXF1110 MAC. The following features are supported.
Functional Description
The SerDes transmit interface sends serialized data at 1.25 GHz. The interface is
differential with two pins for transmit operation. The transmit interface is designed to operate
in a 100 Ω differential environment and all the terminations are included on the device. The
outputs are high speed SerDes and AC coupling is recommended for this interface to
ensure that the correct input bias current is supplied at the receiver.
The SerDes receive interface receives serialized data at 1.25 GHz. The interface is
differential with two pins for the receive operation. The equalizer receives a differential
signal that is equalized for the assumed media channel. The SerDes transmit and receive
interfaces are designed to operate within a 100 Ω differential environment and all
terminations are included on the device.
®
• 10-bit data path, which connects to the output/input of the 8B/10B encoder/decoder
• Data frequency of 1.25 GHz
• Low power: <200 mW per SerDes port
• Asynchronous clock data recovery
IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
PCS that resides in the MAC controller
124).
104.
48. Each port is also compliant with and supports the requirements of
70.
Table 36 on page 104
(SerDes Block Register
Section 5.1.4, Fiber
5.3 SerDes Interface
Section 5.4,
and
Page 67