HFIXF1110CC.B3-998844 Cortina Systems Inc, HFIXF1110CC.B3-998844 Datasheet - Page 8

• Manufacturer Part Number: HFIXF1110CC.B3-998844
• Description: IC ETHERNET MAC 10PORT 552-CBGA
• Manufacturer: Cortina Systems Inc

Specifications of HFIXF1110CC.B3-998844

• Controller Type: Ethernet Controller, MAC
• Interface: SPI-4.2
• Voltage - Supply: 1.8 V, 2.5 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 575-BCBGA Exposed Pad (552 Bumps)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Other names: 1008-1010

IXF1110 MAC
Datasheet
250210, Revision 11.0
13 April 2009
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Cortina Systems
SPI4-2 Interface Signal Descriptions............................................................................................. 20
SerDes Interface Signal Descriptions............................................................................................ 22
CPU Interface Signal Descriptions ................................................................................................ 23
Pause Control Interface Signal Descriptions ................................................................................. 24
Optical Module Interface Signal Descriptions................................................................................ 25
LED Interface Signal Descriptions................................................................................................. 26
JTAG Interface Signal Descriptions............................................................................................... 26
System Interface Signal Descriptions............................................................................................ 27
Power Supply Signal Descriptions................................................................................................. 27
Unused Balls/Reserved ................................................................................................................. 29
Ball List in Alphanumeric Order by Signal Name........................................................................... 30
Ball List in Alphanumeric Order by Ball Location........................................................................... 35
Pause Packets Drop Enable Behavior .......................................................................................... 43
CRC Errored Packets Drop Enable Behavior................................................................................ 43
Valid Decodes for TXPAUSEADD[3:0].......................................................................................... 47
RMON Additional Statistics Registers ........................................................................................... 51
SPI4-2 Interface Signal Summary ................................................................................................. 54
Control Word Format ..................................................................................................................... 56
Control Word Definitions................................................................................................................ 57
FIFO Status Format....................................................................................................................... 66
SerDes Driver TX Power Levels.................................................................................................... 69
IXF1110 MAC-to-SFP Connections............................................................................................... 70
LED Signal Descriptions................................................................................................................ 80
Mode 0 Clock Cycle to Data Bit Relationship ................................................................................ 81
Mode 1 Clock Cycle to Data Bit Relationship ................................................................................ 82
LED Data Decodes........................................................................................................................ 83
LED Behavior ................................................................................................................................ 84
CPU Interface Signals ................................................................................................................... 85
Recommended JTAG Termination ................................................................................................ 88
Supported Boundary Scan Instructions ......................................................................................... 89
Power Sequencing ........................................................................................................................ 93
Analog Power Balls ....................................................................................................................... 93
Absolute Maximum Ratings......................................................................................................... 102
Operating Conditions................................................................................................................... 103
2.5 V CMOS and 3.3 V LVTTL I/O Electrical Characteristics ...................................................... 104
LVDS I/O Electrical Characteristics ............................................................................................. 104
Undershoot/Overshoot Limits ...................................................................................................... 105
CPU Timing Parameters.............................................................................................................. 106
JTAG Timing Parameters ............................................................................................................ 108
Transmit Pause Control Interface Parameters ............................................................................ 108
Optical Module Interrupt Timing Parameters............................................................................... 109
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Hardware Reset Timing Parameters ........................................................................................... 111
LED Timing Parameters .............................................................................................................. 112
Transmitter Characteristics.......................................................................................................... 113
Receiver Characteristics.............................................................................................................. 113
SPI4-2 Transmit FIFO Status Bus Timing Parameters................................................................ 114
SPI4-2 Receive FIFO Status Bus Timing Parameters................................................................. 115
SPI4-2 LVDS Rise/Fall Times ..................................................................................................... 115
SFP-to-IXF1110 MAC Connection ............................................................................................. 100
2
C AC Timing Characteristics..................................................................................................... 110
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IXF1110 10-Port 1000 Mbps Ethernet Media Access Controller
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