78Q8430-100IGTR/F Maxim Integrated Products, 78Q8430-100IGTR/F Datasheet - Page 35
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78Q8430-100IGTR/F
Manufacturer Part Number
78Q8430-100IGTR/F
Description
IC LAN MEDIA ACCESS CTLR 100LQFP
Manufacturer
Maxim Integrated Products
Datasheet
1.78Q8430-ARM9-EVM.pdf
(88 pages)
Specifications of 78Q8430-100IGTR/F
Controller Type
Ethernet Controller, MAC/PHY
Voltage - Supply
3.3V
Current - Supply
230mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Interface
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
78Q8430-100IGTR/F
Manufacturer:
Maxim Integrated
Quantity:
10 000
DS_8430_001
For an arbitrary unicast filter number N, the following procedure should be used to set the address and
mask values:
STEP 1. Write address and mask byte [0] to the CAM. CAM rule 0x70+N should be written as shown in
STEP 2. Write address and mask byte [1] through byte [4] to the CAM. For each byte the CAM rule
STEP 3. Write address and mask byte [5] to the CAM. CAM rule 0x30+N should be written as follows.
Rev. 1.2
CAR
RMR
RCR
CAR
RMR
RCR
CAR
RMR
RCR
Reg.
Reg.
Reg.
the following table:
indicated by Table 24 based on the filter number, N, and byte number should be written as
follows.
Unlike the settings for byte [0], the Previous Hit Mask field is set to 0x7F and the Previous Hit
Match field is always set to the value of the CAM rule used by the previous byte. As an
example, the Previous Hit Mask fields for filter #1 would be 0x71, 0x69, 0x59 and 0x51, for byte
[1] through byte [4] respectively.
ADDR
Data Match
Data Mask
Previous Hit Match
Previous Hit Mask
Byte Offset
Interrupt
Control Logic Action
Match Control
ADDR
Data Match
Data Mask
Previous Hit Match
Previous Hit Mask
Byte Offset
Interrupt
Control Logic Action
Match Control
ADDR
Data Match
Data Mask
Previous Hit Match
Previous Hit Mask
Byte Offset
Interrupt
Control Logic Action
Match Control
Field
Field
Field
0x70+N
Value of MAC address byte [0]
Value of mask byte [0] from the Wild Card setting (0xFF is
for a perfect match)
0x00 to disable the filter
0x00
Retain default: 0x00
Retain default: 0
Retain default: NOP
Retain default: MD
byte [1]:
0x68+N
Value of MAC address byte [1] … byte [4]
Value of mask byte [1] . . . byte [4]
Value of the CAM rule used by the previous byte
0x7F
Retain default: 0x00
Retain default: 0
Retain default: NOP
Retain default: MD
0x30+N
Value of MAC address byte [5]
Value of mask byte [5]
Set to the CAM rule that was used for byte [4] (0x40+N).
0x7F
Retain default: 0x00
Retain default: 0
Set to TAX
Retain default: MD
byte [2]:
0x58+N
Value to write
Value to write
Value to write
byte [3]:
0x50+N
78Q8430 Data Sheet
byte [4]:
0x40+N
35