CP2105-F01-GM Silicon Laboratories Inc, CP2105-F01-GM Datasheet - Page 19

• Manufacturer Part Number: CP2105-F01-GM
• Description: IC SGL USB-DL UART BRIDGE 24QFN
• Manufacturer: Silicon Laboratories Inc

Specifications of CP2105-F01-GM

• Package / Case: 24-WFQFN Exposed Pad
• Applications: UART-to-USB Bridge
• Interface: UART, USB
• Voltage - Supply: 1.8V, 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Input Voltage Range (max): 3.6 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Supply Current (max): 18.5 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 336-2005 - KIT EVAL FOR CP2105
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-2009-5

Alternatively, if 3.0 to 3.6 V power is supplied to the V
device with the voltage regulator bypassed. For this configuration, the REGIN input should be tied to V
the voltage regulator. A typical connection diagram showing the device in a self-powered application with the
regulator bypassed is shown in Figure 9.
The USB max power and power attributes descriptor must match the device power usage and configuration. See
application note “AN144: CP21xx Customization Guide” for information on how to customize USB descriptors for
the CP2105.
Connector
Power
Note 1 : Avalanche transient voltage suppression diodes compatible with Full-speed USB should be
Note 2 : An external pull-up is not required, but can be added for noise immunity.
Note 3 : VIO can be connected directly to VDD or to a supply as low as 1.8 V to set the I/O interface
Note 4 : If configuration ROM is to be programmed via USB, a 4.7 F capacitor must be added
USB
3.3 V
VBUS
GND
D+
D-
added at the connector for ESD protection. Use Littelfuse p/n SP0503BAHT or equivalent.
voltage.
between NC / DCD_ECI / VPP and ground. During a programming operation, the pin should
not be connected to other circuitry, and VDD must be at least 3.3 V.
Figure 9. Typical Self-Powered Connection Diagram (Regulator Bypass)
1-5 F
Note 1
Note 3
0.1 F
VIO
VDD
REGIN
GND
VBUS
D+
D-
Rev. 1.0
DD
CP2105
pin, the CP2105 can function as a USB self-powered
GPIO.0_SCI / DCD_SCI
GPIO.2_SCI / DSR_SCI
GPIO.1_ECI / DSR_ECI
GPIO.1_SCI / DTR_SCI
GPIO0_ECI / DTR_ECI
NC / DCD_ECI / VPP
SUSPEND / RI_ECI
SUSPEND / RI_SCI
RXD_ECI
RXD_SCI
RTS_ECI
CTS_ECI
TXD_ECI
TXD_SCI
RTS_SCI
CTS_SCI
RST
VIO
Enhanced
and GPIO
and GPIO
Standard
Signals
Signals
UART
UART
Note 2
4.7 k
CP2105
DD
Note 4
to bypass
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