TSL2561CL TAOS, TSL2561CL Datasheet - Page 15

• Manufacturer Part Number: TSL2561CL
• Description: Light to Digital Converters Ambient Light Sensor Light to Digital
• Manufacturer: TAOS

Specifications of TSL2561CL

• Data Bus Width: 20 bit
• Peak Wavelength: 640 nm, 940 nm
• Maximum Operating Frequency: 780 KHz
• Operating Supply Voltage: 2.7 V to 3.6 V
• Operating Current: 0.6 mA to 15 uA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: - 30 C
• Interface Type: I2C
• Maximum Fall Time: 300 ns
• Maximum Rise Time: 300 ns
• Mounting Style: SMD/SMT
• Resolution: 16 bit
• Package / Case: Chip LED
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Timing Register (1h)
Interrupt Threshold Register (2h − 5h)
The LUMENOLOGY r Company
Reset Value:
Manual
INTEG
FIELD
GAIN
Resv
Resv
The TIMING register controls both the integration time and the gain of the ADC channels. A common set of
control bits is provided that controls both ADC channels. The TIMING register defaults to 02h at power on.
Integration time is dependent on the INTEG FIELD VALUE and the internal clock frequency. Nominal integration
times and respective scaling between integration times scale proportionally as shown in Table 6. See Note 5
and Note 6 on page 5 for detailed information regarding how the scale values were obtained; see page 22 for
further information on how to calculate lux.
The manual timing control feature is used to manually start and stop the integration time period. If a particular
integration time period is required that is not listed in Table 6, then this feature can be used. For example, the
manual timing control can be used to synchronize the TSL256x device with an external light source (e.g. LED).
A start command to begin integration can be initiated by writing a 1 to this bit field. Correspondingly, the
integration can be stopped by simply writing a 0 to the same bit field.
The interrupt threshold registers store the values to be used as the high and low trigger points for the comparison
function for interrupt generation. If the value generated by channel 0 crosses below or is equal to the low
threshold specified, an interrupt is asserted on the interrupt pin. If the value generated by channel 0 crosses
above the high threshold specified, an interrupt is asserted on the interrupt pin. Registers THRESHLOWLOW
and THRESHLOWHIGH provide the low byte and high byte, respectively, of the lower interrupt threshold.
Registers THRESHHIGHLOW and THRESHHIGHHIGH provide the low and high bytes, respectively, of the
upper interrupt threshold. The high and low bytes from each set of registers are combined to form a 16-bit
threshold value. The interrupt threshold registers default to 00h on power up.
1h
Resv
BIT
7−5
1:0
7
4
3
2
0
Reserved. Write as 0.
Switches gain between low gain and high gain modes. Writing a 0 selects low gain (1
high gain (16
Manual timing control. Writing a 1 begins an integration cycle. Writing a 0 stops an integration cycle.
NOTE: This field only has meaning when INTEG = 11. It is ignored at all other times.
Reserved. Write as 0.
Integrate time. This field selects the integration time for each conversion.
INTEG FIELD VALUE
Resv
0
6
00
01
10
11
×
).
Resv
5
0
r
Table 6. Integration Time
Table 5. Timing Register
www.taosinc.com
GAIN
SCALE
0.034
0.252
4
0
−−
1
Manual
3
0
DESCRIPTION
NOMINAL INTEGRATION TIME
Resv
2
0
13.7 ms
101 ms
402 ms
LIGHT-TO-DIGITAL CONVERTER
N/A
r
1
1
INTEG
TSL2560, TSL2561
Copyright E 2009, TAOS Inc.
TAOS059N − MARCH 2009
×)
0
0
; writing a 1 selects
TIMING
15