TSL2561CL TAOS, TSL2561CL Datasheet - Page 18

• Manufacturer Part Number: TSL2561CL
• Description: Light to Digital Converters Ambient Light Sensor Light to Digital
• Manufacturer: TAOS

Specifications of TSL2561CL

• Data Bus Width: 20 bit
• Peak Wavelength: 640 nm, 940 nm
• Maximum Operating Frequency: 780 KHz
• Operating Supply Voltage: 2.7 V to 3.6 V
• Operating Current: 0.6 mA to 15 uA
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: - 30 C
• Interface Type: I2C
• Maximum Fall Time: 300 ns
• Maximum Rise Time: 300 ns
• Mounting Style: SMD/SMT
• Resolution: 16 bit
• Package / Case: Chip LED
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TSL2560, TSL2561
LIGHT-TO-DIGITAL CONVERTER
TAOS059N − MARCH 2009
ADC Channel Data Registers (Ch − Fh)
NOTE: The Read Word protocol can be used to read byte-paired registers. For example, the DATA0LOW and DATA0HIGH registers (as well as
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Copyright E 2009, TAOS Inc.
The ADC channel data are expressed as 16-bit values spread across two registers. The ADC channel 0 data
registers, DATA0LOW and DATA0HIGH provide the lower and upper bytes, respectively, of the ADC value of
channel 0. Registers DATA1LOW and DATA1HIGH provide the lower and upper bytes, respectively, of the ADC
value of channel 1. All channel data registers are read-only and default to 00h on power up.
The upper byte data registers can only be read following a read to the corresponding lower byte register. When
the lower byte register is read, the upper eight bits are strobed into a shadow register, which is read by a
subsequent read to the upper byte. The upper register will read the correct value even if additional ADC
integration cycles end between the reading of the lower and upper registers.
the DATA1LOW and DATA1HIGH registers) may be read together to obtain the 16-bit ADC value in a single transaction
DATA0HIGH
DATA1HIGH
DATA0LOW
DATA1LOW
REGISTER
ADDRESS
Table 12. ADC Channel Data Registers
Ch
Dh
Eh
Fh
r
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BITS
7:0
7:0
7:0
7:0
ADC channel 0 lower byte
ADC channel 0 upper byte
ADC channel 1 lower byte
ADC channel 1 upper byte
DESCRIPTION
r
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