AT25256B-SSHL-B Atmel, AT25256B-SSHL-B Datasheet - Page 2

• Manufacturer Part Number: AT25256B-SSHL-B
• Description: EEPROM 256Kbit; SPI Bus High Spd; Mode 0 & 3
• Manufacturer: Atmel

Specifications of AT25256B-SSHL-B

• Memory Size: 256Kbit
• Memory Configuration: 32768 X 8
• Interface Type: Serial, SPI
• Clock Frequency: 3MHz
• Supply Voltage Range: 1.8V To 5.5V
• Memory Case Style: SOIC
• No. Of Pins: 8
• Rohs Compliant: Yes
• Density: 256Kb
• Organization: 32Kx8
• Access Time (max): 80ns
• Frequency (max): 5MHz
• Write Protection: Yes
• Data Retention: 100Year
• Operating Supply Voltage (typ): 2.5/3.3/5V
• Package Type: SOIC
• Operating Temp Range: -40C to 85C
• Supply Current: 10mA
• Operating Supply Voltage (min): 1.8V
• Operating Supply Voltage (max): 5.5V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 0-1.
1. Absolute Maximum Ratings*
2
Operating Temperature ....................... –55°C to +125°C
Storage Temperature ........................ –65°C to + 150°C
Voltage on Any Pin
with Respect to Ground............................. –1.0 V +7.0V
Maximum Operating Voltage.................................6.25V
DC Output Current ..............................................5.0 mA
AT25128B/256B [Preliminary]
Pin Configurations
Table 0-1.
Block Write protection is enabled by programming the status register with top ¼, top ½ or entire
array of write protection. Separate Program Enable and Program Disable instructions are pro-
vided for additional data protection. Hardware data protection is provided via the WP pin to
protect against inadvertent write attempts to the status register. The HOLD pin may be used to
suspend any serial communication without resetting the serial sequence.
Pin
CS
SCK
SI
SO
GND
V
WP
HOLD
NC
CC
GND
WP
SO
CS
HOLD
VCC
SCK
Pin Configurations
SI
Function
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
Write Protect
Suspends Serial Input
No Connect
8-lead UDFN
Bottom View
8-lead SOIC
8
7
6
5
1
2
3
4
1
2
3
4
8
7
6
5
CS
SO
WP
GND
VCC
HOLD
SCK
SI
HOLD
GND
VCC
SCK
WP
SO
CS
S I
*NOTICE:
Bottom View
8-ball dBGA2
8-lead TSSOP
8
7
6
5
1
2
3
4
1
2
3
4
CS
SO
WP
GND
8
7
6
5
Stresses beyond those listed under “Abso-
lute Maximum Ratings” may cause perma-
nent damage to the device. This is a stress
rating only and functional operation of the
device at these or any other conditions
beyond those indicated in the operational
sections of this specification are not implied.
Exposure to absolute maximum rating con-
ditions for extended periods may affect
device reliability.
VCC
HOLD
SCK
SI
8593C–SEEPR–8/09