M4A5-192/96-10VNC Lattice, M4A5-192/96-10VNC Datasheet - Page 33

• Manufacturer Part Number: M4A5-192/96-10VNC
• Description: CPLD - Complex Programmable Logic Devices HI PERF E2CMOS PLD
• Manufacturer: Lattice

Specifications of M4A5-192/96-10VNC

• Number Of Macrocells: 192
• Number Of Product Terms Per Macro: 20
• Maximum Operating Frequency: 100 MHz
• Delay Time: 5 ns
• Number Of Programmable I/os: 680
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Package / Case: TQFP-144
• Mounting Style: SMD/SMT
• Supply Voltage (max): 5.25 V
• Supply Voltage (min): 4.75 V
• Package: 144TQFP
• Family Name: ispMACH™ 4A
• Device System Gates: 7500
• Number Of Macro Cells: 192
• Maximum Propagation Delay Time: 10 ns
• Number Of User I/os: 96
• Typical Operating Supply Voltage: 5 V
• Operating Temperature: 0 to 70 °C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

BLOCK DIAGRAM – M4A3-256/160, M4A3-256/192
Block C
Block D
Block E
Block F
16
16
16
16
32
32
32
32
16
16
16
16
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
Output Switch
AND Logic Array
Output Switch
Output Switch
AND Logic Array
Output Switch
AND Logic Array
Macrocells
Macrocells
Macrocells
Macrocells
I/O Cells
I/O Cells
Matrix
I/O Cells
Matrix
I/O Cells
Matrix
Matrix
72 X 98
72 X 98
Block B
72 X 98
72 X 98
Block G
16
16
16
16
16
16
16
16
16
36
16
36
36
16
16
16
36
16
16
16
16
16
16
16
4
4
4
4
4
4
4
4
4
4
4
4
16
16
16
16
32
32
32
32
16
16
16
16
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
Output Switch
AND Logic Array
Output Switch
Output Switch
AND Logic Array
Output Switch
AND Logic Array
Macrocells
Macrocells
Macrocells
Macrocells
I/O Cells
I/O Cells
I/O Cells
I/O Cells
Matrix
Matrix
Matrix
Matrix
72 X 98
72 X 98
Block A
72 X 98
72 X 98
Block H
16
16
16
16
16
16
16
16
16
36
16
36
36
16
16
16
36
16
16
16
ispMACH 4A Family
16
16
16
16
4
4
4
4
4
4
4
4
4
4
4
4
CLK0–CLK3
4
4
4
4
4
4
4
4
4
4
4
4
4
4
16
16
16
16
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
AND Logic Array
AND Logic Array
AND Logic Array
Output Switch
Output Switch
Output Switch
Output Switch
Macrocells
I/O Cells
Macrocells
I/O Cells
I/O Cells
I/O Cells
Block P
72 X 98
Macrocells
72 X 98
Macrocells
72 X 98
72 X 98
Block I
16
16
16
36
36
16
16
16
16
16
16
36
36
16
16
16
Matrix
Matrix
Matrix
Matrix
16
16
16
16
16
16
16
16
32
32
32
32
16
16
16
16
4
4
4
4
4
4
4
4
4
4
4
4
16
16
16
16
and Logic Allocator
and Logic Allocator
and Logic Allocator
and Logic Allocator
AND Logic Array
AND Logic Array
AND Logic Array
AND Logic Array
Output Switch
Output Switch
Output Switch
Output Switch
I/O Cells
Macrocells
I/O Cells
I/O Cells
Macrocells
Macrocells
I/O Cells
Macrocells
Block O
72 X 98
72 X 98
72 X 98
72 X 98
Block J
36
16
16
16
36
16
16
16
16
16
16
36
16
16
16
36
Matrix
Matrix
Matrix
Matrix
16
16
16
16
16
16
16
16
32
32
32
32
16
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16
16
17466G-050
Block N
Block M
Block L
Block K
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