LC4256ZC-75TN100C Lattice, LC4256ZC-75TN100C Datasheet - Page 32

• Manufacturer Part Number: LC4256ZC-75TN100C
• Description: CPLD - Complex Programmable Logic Devices PROGRAMMABLE SUPER FAST HI DENSITY PLD
• Manufacturer: Lattice

Specifications of LC4256ZC-75TN100C

• Memory Type: EEPROM
• Number Of Macrocells: 256
• Number Of Product Terms Per Macro: 80
• Maximum Operating Frequency: 200 MHz
• Delay Time: 4.5 ns
• Number Of Programmable I/os: 48
• Operating Supply Voltage: 1.8 V
• Supply Current: 0.341 mA
• Maximum Operating Temperature: + 90 C
• Minimum Operating Temperature: 0 C
• Package / Case: TQFP-100
• Mounting Style: SMD/SMT
• Supply Voltage (max): 1.9 V
• Supply Voltage (min): 1.7 V
• Package: 100TQFP
• Family Name: ispMACH® 4000Z
• Number Of Macro Cells: 256
• Maximum Propagation Delay Time: 7.5 ns
• Number Of User I/os: 64
• Number Of Logic Blocks/elements: 36
• Typical Operating Supply Voltage: 1.8 V
• Operating Temperature: 0 to 90 °C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ispMACH 4000Z Internal Timing Parameters (Cont.)
Lattice Semiconductor
t
t
Note: Internal Timing Parameters are not tested and are for reference only. Refer to the timing model in this data sheet for
further details.
Parameter
GPTOE
PTOE
Global PT OE Delay
Macrocell PT OE Delay
Description
Over Recommended Operating Conditions
32
ispMACH 4000V/B/C/Z Family Data Sheet
Min.
—
—
-35
Max.
1.9
2.4
Min.
—
—
-37
Max.
2.35
3.35
Min.
—
—
-42
Max.
2.60
2.60
Timing v.2.2
Units
ns
ns