AGL030V5-VQG100 Actel, AGL030V5-VQG100 Datasheet - Page 33

• Manufacturer Part Number: AGL030V5-VQG100
• Description: FPGA - Field Programmable Gate Array 30K System Gates
• Manufacturer: Actel

Specifications of AGL030V5-VQG100

• Processor Series: AGL030
• Core: IP Core
• Maximum Operating Frequency: 892.86 MHz
• Number Of Programmable I/os: 79
• Supply Voltage (max): 1.575 V
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Development Tools By Supplier: AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
• Mounting Style: SMD/SMT
• Supply Voltage (min): 1.425 V
• Number Of Gates: 30 K
• Package / Case: VQFP-100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Guidelines
Toggle Rate Definition
A toggle rate defines the frequency of a net or logic element relative to a clock. It is a percentage. If the
toggle rate of a net is 100%, this means that this net switches at half the clock frequency. Below are
some examples:
Enable Rate Definition
Output enable rate is the average percentage of time during which tristate outputs are enabled. When
nontristate output buffers are used, the enable rate should be 100%.
Table 2-22 • Toggle Rate Guidelines Recommended for Power Calculation
Table 2-23 • Enable Rate Guidelines Recommended for Power Calculation
Component
α
α
Component
β
β
β
1
2
3
1
2
•
•
The average toggle rate of a shift register is 100% because all flip-flop outputs toggle at half of the
clock frequency.
The average toggle rate of an 8-bit counter is 25%:
– Bit 0 (LSB) = 100%
– Bit 1
– Bit 2
– …
– Bit 7 (MSB) = 0.78125%
– Average toggle rate = (100% + 50% + 25% + 12.5% + . . . + 0.78125%) / 8
= 50%
= 25%
Toggle rate of VersaTile outputs
I/O buffer toggle rate
I/O output buffer enable rate
RAM enable rate for read operations
RAM enable rate for write operations
R ev i si o n 1 8
Definition
Definition
IGLOO Low Power Flash FPGAs
Guideline
Guideline
12.5%
12.5%
100%
10%
10%
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