LFXP3C-4TN144C Lattice, LFXP3C-4TN144C Datasheet - Page 349
LFXP3C-4TN144C
Manufacturer Part Number
LFXP3C-4TN144C
Description
FPGA - Field Programmable Gate Array 3.1K LUTs 100 I/O 1.8/2.5/3.3V -4 Spd
Manufacturer
Lattice
Specifications of LFXP3C-4TN144C
Number Of Programmable I/os
100
Data Ram Size
55296
Supply Voltage (max)
3.465 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.71 V
Package / Case
TQFP-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP3C-4TN144C
Manufacturer:
Lattice
Quantity:
135
Company:
Part Number:
LFXP3C-4TN144C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Company:
Part Number:
LFXP3C-4TN144C-3I
Manufacturer:
TI
Quantity:
19
- Current page: 349 of 397
- Download datasheet (10Mb)
Lattice Semiconductor
The above information was specified under the following environmental conditions:
The goal of this exercise is to compute the following device I/O constraints:
The only parameter which can be obtained from the above is the device junction temperature:
The required constraints can be computed as follows:
1. Input setup specification
2. Input hold specification
3. Output maximum propagation delay requirement
4. Output minimum propagation delay requirement
5. Output loading
The preference file to use for this example is shown in Figure 17-3. For more preference language syntax and
examples, refer to the Constraints & Preferences section of the ispLEVER on-line help system.
• Board trace AC loading (Cbac): 60 pf.
• Board trace parasitic capacitance (Cb): 5 pf.
• Port controller input capacitance (Cp) :9 pf.
• FPGA device input capacitance (Co): 9 pf.
• Maximum ambient temperature (Ta): 70 (C.
• Estimated Power Consumption (Q): 2 W.
• 680 PBGAM Package Thermal resistance (j) at 0 feet per minute (fpm) airflow: 13.4 °C/W.
1. Input setup specification.
2. Input hold specification.
3. Maximum output propagation delay.
4. Minimum output propagation delay.
5. Output loading.
6. Temperature.
Tj = j * Q - Ta
= 13.4 * 2 + 70
= 96.8 °C
= P - PDMAXp - PDMAXb - Tskew
= 30 - 18 - 2 - 1
= 9 ns
= PDMINp + PDMINb - Tskew
= 3 + 1 - 1
= 3 ns
= P - TSp - PDMAXb - Tskew
= 30 - 5 - 6 - 1
= 18 ns
= Thp - PDMINb + Tskew
= 3 - 1 + 1
= 3 ns
= Cbac + Cb + Cp
= 60 + 5 + 9
= 74 pf
17-5
Lattice Semiconductor FPGA
Successful Place and Route
Related parts for LFXP3C-4TN144C
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 62 I/O 1.8/2.5/3.3V -4 Spd
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 136 IO 1.8 /2.5/3.3V -4 Spd
Manufacturer:
Lattice
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 100 IO 1.8 /2.5/3.3V -4 Spd I
Manufacturer:
Lattice
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 136 IO 1.8 /2.5/3.3V -4 Spd I
Manufacturer:
Lattice
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTS 100 I/O
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTS 136 I/O
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTS 62 I/O
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTS 62 I/O
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 62 IO 1.8/ 2.5/3.3V -3 Spd I
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 100 I/O 1.8/2.5/3.3V IND
Manufacturer:
Lattice
Datasheet:
Part Number:
Description:
FPGA, 1.8V FLASH, INSTANT ON, SMD
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
Part Number:
Description:
FPGA LatticeXP Family 3000 Cells 320MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 208-Pin PQFP Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
Part Number:
Description:
FPGA LatticeXP Family 3000 Cells 320MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 144-Pin TQFP Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
Part Number:
Description:
FPGA LatticeXP Family 3000 Cells 360MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 100-Pin TQFP Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
Part Number:
Description:
FPGA LatticeXP Family 3000 Cells 360MHz 130nm (CMOS) Technology 1.8V/2.5V/3.3V 144-Pin TQFP Tray
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet: