LFE2M35SE-5FN484C Lattice, LFE2M35SE-5FN484C Datasheet - Page 287
![FPGA - Field Programmable Gate Array 34K LUTs S-Ser SERDE S Mem DSP 1.2V -5](/photos/16/14/161499/landingpagelatticeecp2m_sml.jpg)
LFE2M35SE-5FN484C
Manufacturer Part Number
LFE2M35SE-5FN484C
Description
FPGA - Field Programmable Gate Array 34K LUTs S-Ser SERDE S Mem DSP 1.2V -5
Manufacturer
Lattice
Datasheet
1.LFE2M35SE-5FN484C.pdf
(389 pages)
Specifications of LFE2M35SE-5FN484C
Number Of Macrocells
34000
Maximum Operating Frequency
320 MHz
Number Of Programmable I/os
303
Data Ram Size
2151424
Delay Time
12 ns
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-484
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2M35SE-5FN484C
Manufacturer:
LATTICE
Quantity:
210
Company:
Part Number:
LFE2M35SE-5FN484C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
LFE2M35SE-5FN484C
Manufacturer:
LATTICE
Quantity:
20 000
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LFE2M50E/SE and LFE2M70E/SE Logic Signal Connections: 900 fpBGA
Lattice Semiconductor
Number
GNDIO
GNDIO
GNDIO
GNDIO
VCCIO
Ball
D2
D3
H7
G6
D1
G5
G4
G3
H5
H4
G2
G1
H3
H2
N8
M9
H1
E3
E4
F5
E2
K7
K8
E1
F2
F1
K6
K5
J8
J5
J4
L9
L7
L8
L6
J3
J2
J1
L5
-
-
-
-
-
Function
Ball/Pad
GNDIO7
GNDIO7
GNDIO7
GNDIO7
VCCIO7
PL11A
PL11B
PL12A
PL12B
PL13A
PL13B
PL14A
PL14B
PL15A
PL15B
PL16A
PL16B
PL18A
PL18B
PL19A
PL19B
PL20A
PL20B
PL21A
PL21B
PL23A
PL9A
PL9B
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
-
-
-
-
-
LFE2M50E/SE
Bank
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
LUM0_SPLLC_FB_A
LUM0_SPLLT_FB_A
LUM0_SPLLC_IN_A
LUM0_SPLLT_IN_A
VREF2_7/LDQ6
VREF1_7/LDQ6
Dual Function
LDQ27
Differential
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
4-184
C
C
C
C
C
T
T
C
T
T
T
T
Function
Ball/Pad
GNDIO7
GNDIO7
GNDIO7
GNDIO7
GNDIO7
GNDIO7
PL11A
PL11B
PL12A
PL12B
PL13A
PL13B
PL14A
PL14B
PL15A
PL15B
PL16A
PL16B
PL17A
PL17B
PL18A
PL18B
PL21A
PL21B
PL22A
PL22B
PL24A
PL24B
PL25A
PL25B
PL26A
PL26B
PL27A
PL27B
PL28A
PL28B
PL29A
PL29B
PL30A
PL30B
PL31A
PL31B
PL33A
PL9A
PL9B
-
-
-
-
LatticeECP2/M Family Data Sheet
Bank
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
-
-
-
-
-
-
-
-
-
-
LFE2M70E/SE
LUM0_SPLLC_FB_A/LDQ15
LUM0_SPLLC_IN_A/LDQ15
LUM0_SPLLT_FB_A/LDQ15
LUM0_SPLLT_IN_A/LDQ15
Dual Function
Pinout Information
VREF2_7
VREF1_7
LDQS15
LDQS28
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ15
LDQ28
LDQ28
LDQ28
LDQ28
LDQ28
LDQ28
LDQ28
LDQ28
LDQ28
LDQ28
LDQ28
LDQ28
LDQ28
LDQ28
LDQ28
LDQ37
Differential
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
C (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
T (LVDS)*
C
C
C
C
C
C
C
C
C
C
T
T
T
T
T
T
T
T
T
T
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