LFE3-150EA-7FN1156CTW Lattice, LFE3-150EA-7FN1156CTW Datasheet - Page 101

FPGA - Field Programmable Gate Array 149K LUTs 586 I/O 1.2V -7 Speed

LFE3-150EA-7FN1156CTW

Manufacturer Part Number
LFE3-150EA-7FN1156CTW
Description
FPGA - Field Programmable Gate Array 149K LUTs 586 I/O 1.2V -7 Speed
Manufacturer
Lattice
Datasheet

Specifications of LFE3-150EA-7FN1156CTW

Number Of Programmable I/os
133 to 586
Data Ram Size
6.85 Mbits
Delay Time
37 ns
Supply Voltage (max)
1.26 V
Supply Current
18 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-1156
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFE3-150EA-7FN1156CTW
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
LatticeECP3 sysCONFIG Port Timing Specifications (Continued)
Figure 3-16. sysCONFIG Parallel Port Read Cycle
t
Master and Slave SPI (Continued)
t
t
t
t
Master Clock Frequency
Duty Cycle
Parameter
CHHH
CHHL
HHCH
HLQZ
HHQX
Parameter
HOLDN Low Hold Time (Relative to CCLK)
HOLDN High Hold Time (Relative to CCLK)
HOLDN High Setup Time (Relative to CCLK)
HOLDN to Output High-Z
HOLDN to Output Low-Z
WRITEN
CCLK
CS1N
BUSY
D[0:7]
*n = last byte of read cycle.
CSN
Selected value - 15%
Over Recommended Operating Conditions
Min.
40
t
t
SUCS
SUWD
Description
Byte 0
t
BSCL
3-49
Byte 1
t
CORD
Selected value + 15%
Max.
t
60
DCB
DC and Switching Characteristics
t
Byte 2
BSCYC
t
BSCH
LatticeECP3 Family Data Sheet
Byte n*
t
t
HCS
HWD
Min.
5
5
5
Units
MHz
%
Max.
9
9
Units
ns
ns
ns
ns
ns

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