LFE3-150EA-7FN1156CTW Lattice, LFE3-150EA-7FN1156CTW Datasheet - Page 77
LFE3-150EA-7FN1156CTW
Manufacturer Part Number
LFE3-150EA-7FN1156CTW
Description
FPGA - Field Programmable Gate Array 149K LUTs 586 I/O 1.2V -7 Speed
Manufacturer
Lattice
Datasheet
1.LFE3-150EA-7FN672CTW.pdf
(130 pages)
Specifications of LFE3-150EA-7FN1156CTW
Number Of Programmable I/os
133 to 586
Data Ram Size
6.85 Mbits
Delay Time
37 ns
Supply Voltage (max)
1.26 V
Supply Current
18 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-1156
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE3-150EA-7FN1156CTW
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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Lattice Semiconductor
LatticeECP3 Internal Switching Characteristics
t
t
t
t
t
DSP Block Timing
t
t
t
t
t
t
t
t
t
t
t
t
t
1. Internal parameters are characterized but not tested on every device.
2. Commercial timing numbers are shown. Industrial timing numbers are typically slower and can be extracted from the ispLEVER software.
3. DSP slice is configured in Multiply Add/Sub 18x18 mode.
4. The output register is in Flip-flop mode.
HWREN_EBR
SUCE_EBR
HCE_EBR
SUBE_EBR
HBE_EBR
SUI_DSP
HI_DSP
SUP_DSP
HP_DSP
SUO_DSP
HO_DSP
COI_DSP
COP_DSP
COO_DSP
SUOPT_DSP
HOPT_DSP
SUDATA_DSP
HPDATA_DSP
Parameter
Hold Write/Read Enable to PFU Memory
Clock Enable Setup Time to EBR Output
Register
Clock Enable Hold Time to EBR Output
Register
Byte Enable Set-Up Time to EBR Output
Register
Byte Enable Hold Time to EBR Output
Register
Input Register Setup Time
Input Register Hold Time
Pipeline Register Setup Time
Pipeline Register Hold Time
Output Register Setup Time
Output Register Hold Time
Input Register Clock to Output Time
Pipeline Register Clock to Output Time
Output Register Clock to Output Time
Opcode Register Setup Time
Opcode Register Hold Time
Cascade_data through ALU to Output
Register Setup Time
Cascade_data through ALU to Output
Register Hold Time
3
Over Recommended Commercial Operating Conditions
Description
3-25
-0.066
-0.071
0.141
0.087
0.118
-0.17
-1.02
-1.67
-0.20
-0.44
Min.
0.32
2.23
3.09
0.31
1.55
—
—
—
-8
Max.
3.68
1.30
0.58
—
—
—
—
—
—
—
—
—
—
—
1, 2
DC and Switching Characteristics
LatticeECP3 Family Data Sheet
-0.080
-0.070
(Continued)
0.145
0.096
0.098
-0.19
-1.09
-1.76
-0.24
-0.53
Min.
0.36
0.35
2.30
3.22
1.67
—
—
—
-7
Max.
4.03
1.47
0.60
—
—
—
—
—
—
—
—
—
—
—
-0.094
-0.068
0.149
0.104
0.077
-0.21
-1.15
-1.84
-0.27
-0.61
Min.
0.39
2.37
3.34
0.39
1.78
—
—
—
-6
Max.
4.38
1.64
0.62
—
—
—
—
—
—
—
—
—
—
—
Units.
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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