MAX7032ATJ+ Maxim Integrated Products, MAX7032ATJ+ Datasheet - Page 16

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MAX7032ATJ+

Manufacturer Part Number
MAX7032ATJ+
Description
RF Transceiver IC TXRX ASK/FSK PROG MHz Crystal-Based, P
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX7032ATJ+

Number Of Receivers
1
Number Of Transmitters
1
Wireless Frequency
300 MHz to 450 MHz
Output Power
6.7 dBm
Operating Supply Voltage
2.7 V, 5 V
Maximum Operating Temperature
+ 125C
Mounting Style
SMD/SMT
Maximum Supply Current
12.5 mA
Minimum Operating Temperature
- 40 C
Modulation
ASK/OOK.FSK
Package / Case
TQFN-32 EP
Data Rate
33Kbps
Supply Voltage Range
2.1V To 3.6V, 4.5V To 5.5V
Logic Case Style
QFN
No. Of Pins
32
Operating Temperature Range
-40°C To +125°C
Filter Terminals
SMD
Rohs Compliant
Yes
Data Rate Max
66Kbps
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The maximum and minimum peak detectors can be
used together to form a data slicer threshold voltage at
a value midway between the maximum and minimum
voltage levels of the data stream (see the Data Slicer
section and Figure 4). The RC time constant of the
peak-detector combining network should be set to at
least 5 times the data period.
If there is an event that causes a significant change in
the magnitude of the baseband signal, such as an AGC
gain switch or a power-up transient, the peak detectors
may “catch” a false level. If a false peak is detected,
the slicing level is incorrect. The MAX7032 has a fea-
ture called peak-detector track enable (TRK_EN),
where the peak-detector outputs can be reset (see
Figure 5). If TRK_EN is set (logic 1), both the maximum
and minimum peak detectors follow the input signal.
When TRK_EN is cleared (logic 0), the peak detectors
revert to their normal operating mode. The TRK_EN
function is automatically enabled for a short time when-
ever the IC is first powered up, or transitions from trans-
mit to receive mode, or recovers from the sleep portion
of DRX mode, or when an AGC gain switch occurs
regardless of the bit setting. Since the peak detectors
exhibit a fast-attack/slow-decay response, this feature
allows for an extremely fast startup or AGC recovery.
See Figure 6 for an illustration of a fast-recovery
sequence. In addition to the automatic control of this
function, the TRK_EN bits can be controlled through the
serial interface (see the Serial Control Interface section).
The PA of the MAX7032 is a high-efficiency, open-
drain, switch-mode amplifier. The PA with proper
Low-Cost, Crystal-Based, Programmable,
ASK/FSK Transceiver with Fractional-N PLL
Figure 4. Generating Data Slicer Threshold Using the Peak
Detectors
16
______________________________________________________________________________________
DATA
MAX7032
SLICER
DATA
C
PEAK
DET
PDMAX
R
Power Amplifier (PA)
R
PEAK
DET
Transmitter
PDMIN
C
output-matching network can drive a wide range of
antenna impedances, which includes a small-loop PCB
trace and a 50Ω antenna. The output-matching network
for a 50Ω antenna is shown in the Typical Application
Circuit . The output-matching network suppresses the
carrier harmonics and transforms the antenna imped-
ance to an optimal impedance at PAOUT (pin 5). The
optimal impedance at PAOUT is 250Ω.
When the output-matching network is properly tuned,
the PA transmits power with a high overall efficiency of
up to 32%. The efficiency of the PA itself is more than
46%. The output power is set by an external resistor at
PAOUT and is also dependent on the external antenna
and antenna-matching network at the PA output.
Figure 5. Peak-Detector Track Enable
Figure 6. Fast Receiver Recovery in FSK Mode Utilizing Peak
Detectors
BASEBAND
MAX7032
FILTER
DATA OUTPUT
200mV/div
2V/div
MAXIMUM PEAK
MINIMUM PEAK
DETECTOR
DETECTOR
RECEIVER ENABLED, TRK_EN SET
TRK_EN = 1
TRK_EN = 1
FILTER OUTPUT
100µs/div
MAX PEAK DETECTOR
MIN PEAK DETECTOR
DATA OUTPUT
TRK_EN CLEARED
PDMIN
PDMAX
TO SLICER
INPUT

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