MAX7032ATJ+ Maxim Integrated Products, MAX7032ATJ+ Datasheet - Page 26

• Manufacturer Part Number: MAX7032ATJ+
• Description: RF Transceiver IC TXRX ASK/FSK PROG MHz Crystal-Based, P
• Manufacturer: Maxim Integrated Products

Specifications of MAX7032ATJ+

• Number Of Receivers: 1
• Number Of Transmitters: 1
• Wireless Frequency: 300 MHz to 450 MHz
• Output Power: 6.7 dBm
• Operating Supply Voltage: 2.7 V, 5 V
• Maximum Operating Temperature: + 125C
• Mounting Style: SMD/SMT
• Maximum Supply Current: 12.5 mA
• Minimum Operating Temperature: - 40 C
• Modulation: ASK/OOK.FSK
• Package / Case: TQFN-32 EP
• Data Rate: 33Kbps
• Supply Voltage Range: 2.1V To 3.6V, 4.5V To 5.5V
• Logic Case Style: QFN
• No. Of Pins: 32
• Operating Temperature Range: -40°C To +125°C
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Data Rate Max: 66Kbps
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Low-Cost, Crystal-Based, Programmable,
ASK/FSK Transceiver with Fractional-N PLL
Set OFPS1 to be 1 and OFPS0 to be 1. That sets the
t
and REG 0x07 to be FFFF, which is 65535 in decimal.
Therefore, the total t
During t
supply current (23.4µA typ), where all its modules are
turned off, except for the t
pletion of the t
by asserting DIO low.
The CPU recovery timer, t
to delay power up of the MAX7032, thereby providing
extra power savings and giving the CPU time to com-
plete its own power-on sequence. The CPU is signaled
to begin powering up when the DIO line is pulled low
by the MAX7032 at the end of t
counting, while DIO is held low by the MAX7032. At the
end of t
t
The possible t
The data written to the t
multiplied by 120µs to give the total t
example below. On power-up, the CPU timer register is
reset to zero and must be written before using DRX
mode.
Set REG 0x08 to be FF in hex, which is 255 in decimal.
Therefore, the total t
Figure 10. DRX Mode Sequence of the MAX7032
26
OFF
CPU
______________________________________________________________________________________
time base (1 LSB) to be 7680µs. Set REG 0x06
is an 8-bit timer, configured through register 0x08.
CPU
OFF
t
OFF
, the t
, the MAX7032 is operating with very low
t
CPU
CPU
OFF
= 7680µs x 65535 = 8min 23s
RF
= 120µs x 255 = 30.6ms
settings are summarized in Table 13.
time, the MAX7032 signals the user
OFF
CPU
counter begins.
ASK_DATA OR
FSK_DATA
is:
is:
CPU
t
CPU Recovery Timer (t
CPU
DIO
t
CPU
CS
OFF
OFF
t
t
ON
RF
register (register 0x08) is
(see Figure 10), is used
OFF
timer itself. Upon com-
. Then, t
CPU
time. See the
CPU
t
OFF
begins
CPU
t
CPU
)
The RF settling timer, t
sections of the MAX7032 to power up and stabilize
before ASK or FSK data is received. t
ing once t
modules selected in the power control register (register
0x00) are all powered up and the peak detectors are in
the track mode and have the t
t
(upper byte) and register 0x0A (lower byte). The possi-
ble t
to the t
multiplied by 120µs to give the total t
example in the CPU Recovery Timer ( t
power-up, the RF timer registers are reset to zero and
must be written before using DRX mode.
Table 13. CPU Recovery Timer (t
Configuration
Table 14. RF Settling Timer (t
Configuration
RF
t
TIME BASE
RF
t
RF
is a 16-bit timer, configured through register 0x09
RF
TIME BASE
(µs)
120
120
(µs)
RF
settings are listed in Table 14. The data written
t
LOW
CPU
register (register 0x09 and register 0x0A) are
t
ON
has expired. At the beginning of t
REG 0x08 = 0x01
REG 0x0A = 0x01
REG 0x09 = 0x00
MIN t
MIN t
RF
(µs)
120
(µs)
120
CPU
(see Figure 10), allows the RF
RF
RF
RF Settling Timer (t
period to settle.
REG 0x0A = 0xFF
REG 0x08 = 0xFF
REG 0x09 = 0xFF
RF
CPU
RF
RF
MAX t
begins count-
)
MAX t
time. See the
) section. On
CPU
(ms)
30.6
7.86
(s)
CPU
RF
)
RF
, the
RF
)