MSC7116VF1000 Freescale Semiconductor, MSC7116VF1000 Datasheet - Page 21

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MSC7116VF1000

Manufacturer Part Number
MSC7116VF1000
Description
DSP 16BIT W/DDR CTRLR 400-MAPBGA
Manufacturer
Freescale Semiconductor
Series
MSC711x StarCorer
Type
Fixed Pointr
Datasheet

Specifications of MSC7116VF1000

Interface
Host Interface, I²C, UART
Clock Rate
266MHz
Non-volatile Memory
ROM (8 kB)
On-chip Ram
400kB
Voltage - I/o
3.30V
Voltage - Core
1.20V
Operating Temperature
-40°C ~ 105°C
Mounting Type
*
Package / Case
400-MAPBGA
Device Core Size
16b
Format
Fixed Point
Clock Freq (max)
266MHz
Mips
266
Device Input Clock Speed
266MHz
Ram Size
192KB
Program Memory Size
Not RequiredKB
Operating Supply Voltage (typ)
1.2/2.5/3.3V
Operating Supply Voltage (min)
1.14/2.38/3.14V
Operating Supply Voltage (max)
1.26/2.63/3.47V
Operating Temp Range
-40C to 105C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
400
Package Type
MA-BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MSC7116VF1000
Manufacturer:
SONY
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Part Number:
MSC7116VF1000
Manufacturer:
Freescale Semiconductor
Quantity:
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2.5
This section presents timing diagrams and specifications for individual signals and parallel I/O outputs and inputs. All AC
timings are based on a 30 pF load, except where noted otherwise, and a 50 Ω transmission line. For any additional pF, use the
following equations to compute the delay:
2.5.1
The following tables describe clock signal characteristics. Table 6 shows the maximum frequency values for internal (core,
reference, and peripherals) and external (
Section 2.5.2 for the allowable ranges when using the PLL).
Freescale Semiconductor
Core clock frequency (CLOCK)
External output clock frequency (CLKO)
Memory clock frequency (CK, CK)
TDM clock frequency (TxRCK, TxTCK)
CLKIN frequency
CLOCK frequency
CK, CK frequency
TDMxRCK, TDMxTCK frequency
CLKO frequency
AHB/IPBus/APB clock frequency
Note:
CLKIN frequency
CLKIN slope
CLKIN frequency jitter (peak-to-peak)
CLKO frequency jitter (peak-to-peak)
— Standard interface: 2.45 + (0.054 × C
— DDR interface: 1.6 + (0.002 × C
The rise and fall time of external clocks should be 5 ns maximum
AC Timings
Clock and Timing Signals
Characteristic
Characteristic
Characteristic
CLKO
Table 7. Clock Frequencies in MHz
Table 8. System Clock Parameters
Table 6. Maximum Frequencies
load
) clocks. You must ensure that maximum frequency values are not exceeded (see
MSC7116 Data Sheet, Rev. 13
) ns
load
) ns
Symbol
F
F
F
F
TDMCK
F
Min
CLKIN
CORE
F
CKO
BCK
10
CK
Maximum in MHz
266
133
67
50
Max
1000
Min
100
133
10
5
Electrical Characteristics
Max
Unit
MHz
100
266
133
133
50
67
ns
ps
ps
21

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