XC3S1400AN-5FGG484C Xilinx Inc, XC3S1400AN-5FGG484C Datasheet - Page 98
XC3S1400AN-5FGG484C
Manufacturer Part Number
XC3S1400AN-5FGG484C
Description
IC FPGA SPARTAN-3AN 484FPGA
Manufacturer
Xilinx Inc
Series
Spartan™-3ANr
Specifications of XC3S1400AN-5FGG484C
Number Of Logic Elements/cells
25344
Number Of Labs/clbs
2816
Total Ram Bits
589824
Number Of I /o
372
Number Of Gates
1400000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-BBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
DS557 (v4.1) April 1, 2011
Product Specification
FGG400 Footprint
Left Half of FGG400
Package (Top View)
155
46
51
26
32
43
22
2
4
9
8
2
I/O: Unrestricted,
general-purpose user I/O
INPUT: Unrestricted,
general-purpose input pin
DUAL: Configuration pins,
then possible user I/O
VREF: User I/O or input
voltage reference for bank
CLK: User I/O, input, or
clock buffer input
CONFIG: Dedicated
configuration pins
JTAG: Dedicated JTAG
port pins
SUSPEND: Dedicated
SUSPEND and
dual-purpose AWAKE
Power Management pins
GND: Ground
VCCO: Output voltage
supply for bank
VCCINT: Internal core
supply voltage (+1.2V)
VCCAUX: Auxiliary supply
voltage
X-Ref Target - Figure 22
Figure 22: FGG400 Package Footprint (Top View)
W
A
B
C
D
G
H
K
M
N
R
U
E
F
J
L
P
T
V
Y
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VCCAUX
VREF_3
LHCLK0
LHCLK6
LHCLK7
VREF_3
L02P_3
L03P_3
L05P_3
L05N_3
L13P_3
L13N_3
L17P_3
L21P_3
L21N_3
L25P_3
L28P_3
L28N_3
L32P_3
L34P_3
L37P_3
L38P_3
TRDY2
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
1
PUDC_B
VCCO_3
VCCO_3
VCCO_3
VREF_0
LHCLK1
VREF_3
L32N_0
L02N_3
L03N_3
L10N_3
L12N_3
L16N_3
L17N_3
L25N_3
L32N_3
L37N_3
L38N_3
L02N_2
L32P_0
L22P_3
L30P_3
CSO_B
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
2
LHCLK2
LHCLK3
L30N_0
L01N_3
L14N_3
L22N_3
L30N_3
L34N_3
L30P_0
L10P_3
L09P_3
L12P_3
L16P_3
L18P_3
L18N_3
L26P_3
L29P_3
L33P_3
L02P_2
L03P_2
IRDY2
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
M2
Spartan-3AN FPGA Family: Pinout Descriptions
3
VCCO_0
LHCLK4
L29P_0
L29N_0
L01P_3
L06P_3
L09N_3
L08N_3
L14P_3
L20P_3
L24P_3
L26N_3
L29N_3
L33N_3
L36N_3
L01P_2
L01N_2
L03N_2
L08P_2
GND
TMS
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
M1
M0
4
VCCAUX
VCCO_3
VCCO_3
VCCO_2
INPUT
LHCLK5
INPUT
L26P_0
L26N_0
L28P_0
L06N_3
L07N_3
L19N_3
L20N_3
L24N_3
L35P_3
L36P_3
L05N_2
L05P_2
L08N_2
GND
TDI
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
5
Bank 0
Bank 2
INPUT
VREF_3
INPUT
INPUT
INPUT
INPUT
INPUT
L25P_0
L25N_0
L28N_0
L31P_0
L31N_0
L04N_3
L08P_3
L07P_3
L19P_3
L23N_3
L31P_3
L35N_3
L39P_3
L04P_2
L06N_2
L09P_2
L09N_2
L10P_2
GND
GND
VS0
VS1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
6
VCCO_0
INPUT
INPUT
INPUT
VREF_3
INPUT
INPUT
INPUT
INPUT
INPUT
VREF_3
L24N_0
L27N_0
L11N_3
L15N_3
L27N_3
L31N_3
L39N_3
L04N_2
L07N_2
L10N_2
L24P_0
L21P_0
L27P_0
L04P_3
L23P_3
L06P_2
L12P_2
GND
VS2
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
D7
7
VCCAUX
RDWR_B
VCCAUX
VCCO_2
GCLK11
VREF_2
L18N_0
L20N_0
L21N_0
L23N_0
INPUT
INPUT
INPUT
INPUT
INPUT
INPUT
L12N_2
L20P_0
L23P_0
L11P_3
L15P_3
L27P_3
L07P_2
L13P_2
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
D6
8
VCCINT
VCCINT
GCLK10
VREF_0
VREF_2
GCLK12
GCLK13
INPUT
INPUT
INPUT
INPUT
L18P_0
L19P_0
L19N_0
L22P_0
L22N_0
L11P_2
L11N_2
L13N_2
L15P_2
L15N_2
GND
GND
GND
GND
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
9
DS529-4_03_011608
VCCINT
VCCINT
VCCINT
VCCO_0
VCCO_0
GCLK14
GCLK15
INPUT
INPUT
INPUT
VREF_2
INPUT
L16P_0
L16N_0
L17P_0
L17N_0
L14N_2
L14P_2
L16P_2
L16N_2
GCLK6
GCLK7
GCLK8
GCLK9
GND
GND
GND
10
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
D4
D5
98