PIC18F45K80-I/P Microchip Technology, PIC18F45K80-I/P Datasheet - Page 581
PIC18F45K80-I/P
Manufacturer Part Number
PIC18F45K80-I/P
Description
MCU PIC 32KB FLASH 40DIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F25K80-ISO.pdf
(628 pages)
Specifications of PIC18F45K80-I/P
Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
64MHz
Connectivity
ECAN, I²C, LIN, SPI, UART/USART
Number Of I /o
35
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.6K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 11x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
PIC18
Ram Memory Size
4KB
Cpu Speed
16MIPS
No. Of Pwm Channels
5
Embedded Interface Type
I2C, SPI, USART
Processor Series
PIC18F45K80
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
35
Number Of Timers
5
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
PIC18F45K80-I/PT
Manufacturer:
MICROCHIP
Quantity:
1 500
Company:
Part Number:
PIC18F45K80-I/PT
Manufacturer:
PIC
Quantity:
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Company:
Part Number:
PIC18F45K80-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
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Manufacturer:
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Quantity:
20 000
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FIGURE 31-14:
TABLE 31-18: EXAMPLE SPI SLAVE MODE REQUIREMENTS (CKE = 1)
2011 Microchip Technology Inc.
Param
70
70A
71
71A
72
72A
73A
74
75
76
77
78
79
80
82
83
Note 1:
No.
SSx
SCKx
(CKPx = 0 )
SCKx
(CKPx = 1 )
SDOx
SDIx
2:
Note:
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
SS
SS
SS
SC
SC
SC
SC
SS
SC
SC
SC
SC
SS
SC
SC
Symbol
B
DO
DO
2
Requires the use of Parameter #73A.
Only if Parameter #71A and #72A are used.
L2
L2
L2
L2WB SSx to write to SSPBUF
H2
H2
L2
H2
L2
H
L
H2
L2
R
F
B
R
F
DO
DO
SS
SC
SC
DI
DO
SS
Refer to
DI
DO
L
L,
H
V SDOx Data Output Valid after SSx Edge
H,
L
V
H,
V,
Z SSx to SDOx Output High-Impedance
SSx to SCKx or SCKx Input
SCKx Input High Time
(Slave mode)
SCKx Input Low Time
(Slave mode)
Last Clock Edge of Byte 1 to the First Clock Edge of Byte 2 1.5 T
Hold Time of SDIx Data Input to SCKx Edge
SDOx Data Output Rise Time
SDOx Data Output Fall Time
SCKx Output Rise Time (Master mode)
SCKx Output Fall Time (Master mode)
SDOx Data Output Valid after SCKx Edge
SSx after SCKx Edge
82
Figure 31-3
EXAMPLE SPI SLAVE MODE TIMING (CKE = 1)
70
MSb In
MSb
74
71
for load conditions.
75, 76
Characteristic
72
bit 6 - - - - - - 1
bit 6 - - - - 1
Preliminary
Continuous
Single Byte
Continuous
Single Byte
PIC18F66K80 FAMILY
80
LSb In
LSb
1.25 T
1.25 T
1.5 T
3 T
3 T
Min
CY
CY
40
40
40
—
10
—
—
—
—
—
CY
CY
CY
CY
83
+ 40
+ 40
+ 30
+ 30
77
Max Units Conditions
25
25
50
25
25
50
50
—
—
—
—
—
—
—
—
—
DS39977C-page 581
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)
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