MPC8533EVTARJA Freescale Semiconductor, MPC8533EVTARJA Datasheet - Page 1165

• Manufacturer Part Number: MPC8533EVTARJA
• Description: MPU POWERQUICC 783-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MPC8533EVTARJA

• Processor Type: MPC85xx PowerQUICC III 32-Bit
• Speed: 1.067GHz
• Voltage: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Package / Case: 783-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -

Table 19-4
Freescale Semiconductor
1
10–15
17–25
26–30
2:1 CCB to SYSCLK clock ratio may not be selected when PCI_clk_sel are configured to run off of SYSCLK.
Offset 0xE_0000
Bits
Reset 0 0 0 0 0 0 0
0–9
16
31
W
R
0
PCI_clk_sel Clock used for PCI. This bit corresponds to the values on cfg_pci_clk_sel at the negation of HRESET:
e500_Ratio
Plat_Ratio
describes the bit settings of PORPLLSR.
Name
—
—
—
MPC8533E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
—
Reserved
Clock ratio between the e500 core and the CCB clock. The 3 lsbs of this field correspond to the values
on cfg_core_pll[0:2] at the negation of HRESET. Patterns not shown are reserved.
000010 1:1
000011 3:2
000100 2:1
000101 5:2
0 PCI runs off of PCI_CLK
1 PCI runs off of SYSCLK
Reserved
Clock ratio between the CCB (platform) clock and SYSCLK. The 4 lsbs correspond to the values on
cfg_sys_pll[0:3] at the negation of HRESET. Patterns not shown are reserved.
00010
00011
00100
00101
00110
Reserved
0
0
Figure 19-1. POR PLL Status Register (PORPLLSR)
0 n n n n n n
9 10
2:1
3:1
4:1
5:1
6:1
1
Table 19-4. PORPLLSR Field Descriptions
e500_Ratio
15
PCI_clk_sel
1
16
n
Description
17
n
000110 3:1
000111 7:2
001000 4:1
001001 9:2
01000
01001
01010
01100
10000
11101
0 0 0 0 0
—
8:1
9:1
10:1
12:1
16:1
20:1
0
0
25 26
0 n n n n n
Access: Read Only
Plat_Ratio
Global Utilities
30
31
0
n
19-5